vhdl_c64_c1541_sd\apply_fpga64_patch.bat
vhdl_c64_c1541_sd\D64_Liste.ods
vhdl_c64_c1541_sd\de0_nano
vhdl_c64_c1541_sd\de0_nano\C64_de0_nano.qpf
vhdl_c64_c1541_sd\de0_nano\C64_de0_nano.qsf
vhdl_c64_c1541_sd\de0_nano\DE0_nano_pin_assignments.csv
vhdl_c64_c1541_sd\de1
vhdl_c64_c1541_sd\de1\C64_de1.qpf
vhdl_c64_c1541_sd\de1\C64_de1.qsf
vhdl_c64_c1541_sd\de1\DE1_pin_assignments.csv
vhdl_c64_c1541_sd\de2
vhdl_c64_c1541_sd\de2\C64_de2.qpf
vhdl_c64_c1541_sd\de2\C64_de2.qsf
vhdl_c64_c1541_sd\de2\DE2_pin_assignments.csv
vhdl_c64_c1541_sd\fpga64.patch
vhdl_c64_c1541_sd\roms
vhdl_c64_c1541_sd\roms\1541_c000_01_and_e000_06aa.hex
vhdl_c64_c1541_sd\roms\25196801.hex
vhdl_c64_c1541_sd\roms\25196802.hex
vhdl_c64_c1541_sd\roms\325302-1_901229-03.hex
vhdl_c64_c1541_sd\rtl_dar
vhdl_c64_c1541_sd\rtl_dar\c1541_logic.vhd
vhdl_c64_c1541_sd\rtl_dar\c1541_sd.vhd
vhdl_c64_c1541_sd\rtl_dar\c64_de0_nano.vhd
vhdl_c64_c1541_sd\rtl_dar\c64_de1.vhd
vhdl_c64_c1541_sd\rtl_dar\c64_de2.vhd
vhdl_c64_c1541_sd\rtl_dar\composite_sync.vhd
vhdl_c64_c1541_sd\rtl_dar\decodeur_7_segments.vhd
vhdl_c64_c1541_sd\rtl_dar\gcr_floppy.vhd
vhdl_c64_c1541_sd\rtl_dar\pll50_to_32_and_18.ppf
vhdl_c64_c1541_sd\rtl_dar\pll50_to_32_and_18.qip
vhdl_c64_c1541_sd\rtl_dar\pll50_to_32_and_18.vhd
vhdl_c64_c1541_sd\rtl_dar\sid6581.vhd
vhdl_c64_c1541_sd\rtl_dar\spi_controller.vhd
vhdl_c64_c1541_sd\rtl_dar\wm8731_dac.vhd
vhdl_c64_c1541_sd\rtl_edward
vhdl_c64_c1541_sd\rtl_edward\spi_controller.ori.vhd
vhdl_c64_c1541_sd\rtl_pace
vhdl_c64_c1541_sd\rtl_pace\c1541_logic.ori.vhd
vhdl_c64_c1541_sd\rtl_pace\m6522.vhd
vhdl_c64_c1541_sd\rtl_pace\sid_voice.vhd
vhdl_c64_c1541_sd\rtl_pace\sid6581.ori.vhd
vhdl_c64_c1541_sd\rtl_pace\spram.vhd
vhdl_c64_c1541_sd\rtl_pace\sprom.vhd
vhdl_c64_c1541_sd\t65
vhdl_c64_c1541_sd\t65\T65.vhd
vhdl_c64_c1541_sd\t65\T65_ALU.vhd
vhdl_c64_c1541_sd\t65\T65_MCode.vhd
vhdl_c64_c1541_sd\t65\T65_Pack.vhd
vhdl_c64_c1541_sd\README.txt