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文件名称:project_1

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  • 上传时间:
    2017-10-08
  • 文件大小:
    549kb
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介绍说明--下载内容来自于网络,使用问题请自行百度

在FPGA上实现一个流水灯,包括端口设定等(On FPGA to achieve a water led, including port settings)
相关搜索: verilog vivado 流水灯

(系统自动生成,下载前可以参看下载内容)

下载文件列表

project_1\project_1.cache\wt\gui_resources.wdf
project_1\project_1.cache\wt\java_command_handlers.wdf
project_1\project_1.cache\wt\project.wpc
project_1\project_1.cache\wt\synthesis.wdf
project_1\project_1.cache\wt\synthesis_details.wdf
project_1\project_1.cache\wt\webtalk_pa.xml
project_1\project_1.cache\wt\xsim.wdf
project_1\project_1.hw\hw_1\hw.xml
project_1\project_1.hw\project_1.lpr
project_1\project_1.ip_user_files\README.txt
project_1\project_1.runs\.jobs\vrs_config_1.xml
project_1\project_1.runs\.jobs\vrs_config_2.xml
project_1\project_1.runs\.jobs\vrs_config_3.xml
project_1\project_1.runs\.jobs\vrs_config_4.xml
project_1\project_1.runs\.jobs\vrs_config_5.xml
project_1\project_1.runs\.jobs\vrs_config_6.xml
project_1\project_1.runs\.jobs\vrs_config_7.xml
project_1\project_1.runs\impl_1\.init_design.begin.rst
project_1\project_1.runs\impl_1\.init_design.end.rst
project_1\project_1.runs\impl_1\.opt_design.begin.rst
project_1\project_1.runs\impl_1\.opt_design.end.rst
project_1\project_1.runs\impl_1\.place_design.begin.rst
project_1\project_1.runs\impl_1\.place_design.end.rst
project_1\project_1.runs\impl_1\.route_design.begin.rst
project_1\project_1.runs\impl_1\.route_design.end.rst
project_1\project_1.runs\impl_1\.vivado.begin.rst
project_1\project_1.runs\impl_1\.vivado.end.rst
project_1\project_1.runs\impl_1\.Vivado_Implementation.queue.rst
project_1\project_1.runs\impl_1\.write_bitstream.begin.rst
project_1\project_1.runs\impl_1\.write_bitstream.end.rst
project_1\project_1.runs\impl_1\firstone.bit
project_1\project_1.runs\impl_1\firstone.tcl
project_1\project_1.runs\impl_1\firstone.vdi
project_1\project_1.runs\impl_1\firstone_4176.backup.vdi
project_1\project_1.runs\impl_1\firstone_clock_utilization_routed.rpt
project_1\project_1.runs\impl_1\firstone_control_sets_placed.rpt
project_1\project_1.runs\impl_1\firstone_drc_opted.rpt
project_1\project_1.runs\impl_1\firstone_drc_routed.pb
project_1\project_1.runs\impl_1\firstone_drc_routed.rpt
project_1\project_1.runs\impl_1\firstone_drc_routed.rpx
project_1\project_1.runs\impl_1\firstone_io_placed.rpt
project_1\project_1.runs\impl_1\firstone_methodology_drc_routed.rpt
project_1\project_1.runs\impl_1\firstone_methodology_drc_routed.rpx
project_1\project_1.runs\impl_1\firstone_opt.dcp
project_1\project_1.runs\impl_1\firstone_placed.dcp
project_1\project_1.runs\impl_1\firstone_power_routed.rpt
project_1\project_1.runs\impl_1\firstone_power_routed.rpx
project_1\project_1.runs\impl_1\firstone_power_summary_routed.pb
project_1\project_1.runs\impl_1\firstone_routed.dcp
project_1\project_1.runs\impl_1\firstone_route_status.pb
project_1\project_1.runs\impl_1\firstone_route_status.rpt
project_1\project_1.runs\impl_1\firstone_timing_summary_routed.rpt
project_1\project_1.runs\impl_1\firstone_timing_summary_routed.rpx
project_1\project_1.runs\impl_1\firstone_utilization_placed.pb
project_1\project_1.runs\impl_1\firstone_utilization_placed.rpt
project_1\project_1.runs\impl_1\gen_run.xml
project_1\project_1.runs\impl_1\htr.txt
project_1\project_1.runs\impl_1\init_design.pb
project_1\project_1.runs\impl_1\ISEWrap.js
project_1\project_1.runs\impl_1\ISEWrap.sh
project_1\project_1.runs\impl_1\opt_design.pb
project_1\project_1.runs\impl_1\place_design.pb
project_1\project_1.runs\impl_1\project.wdf
project_1\project_1.runs\impl_1\route_design.pb
project_1\project_1.runs\impl_1\rundef.js
project_1\project_1.runs\impl_1\runme.bat
project_1\project_1.runs\impl_1\runme.log
project_1\project_1.runs\impl_1\runme.sh
project_1\project_1.runs\impl_1\usage_statistics_webtalk.html
project_1\project_1.runs\impl_1\usage_statistics_webtalk.xml
project_1\project_1.runs\impl_1\vivado.jou
project_1\project_1.runs\impl_1\vivado.pb
project_1\project_1.runs\impl_1\vivado_4176.backup.jou
project_1\project_1.runs\impl_1\write_bitstream.pb
project_1\project_1.runs\synth_1\.vivado.begin.rst
project_1\project_1.runs\synth_1\.vivado.end.rst
project_1\project_1.runs\synth_1\.Vivado_Synthesis.queue.rst
project_1\project_1.runs\synth_1\.Xil\firstone_propImpl.xdc
project_1\project_1.runs\synth_1\firstone.dcp
project_1\project_1.runs\synth_1\firstone.tcl
project_1\project_1.runs\synth_1\firstone.vds
project_1\project_1.runs\synth_1\firstone_utilization_synth.pb
project_1\project_1.runs\synth_1\firstone_utilization_synth.rpt
project_1\project_1.runs\synth_1\gen_run.xml
project_1\project_1.runs\synth_1\htr.txt
project_1\project_1.runs\synth_1\ISEWrap.js
project_1\project_1.runs\synth_1\ISEWrap.sh
project_1\project_1.runs\synth_1\rundef.js
project_1\project_1.runs\synth_1\runme.bat
project_1\project_1.runs\synth_1\runme.log
project_1\project_1.runs\synth_1\runme.sh
project_1\project_1.runs\synth_1\vivado.jou
project_1\project_1.runs\synth_1\vivado.pb
project_1\project_1.sim\sim_1\behav\compile.bat
project_1\project_1.sim\sim_1\behav\compile.log
project_1\project_1.sim\sim_1\behav\elaborate.bat
project_1\project_1.sim\sim_1\behav\elaborate.log
project_1\project_1.sim\sim_1\behav\firstone.tcl
project_1\project_1.sim\sim_1\behav\firstone_behav.wdb
project_1\project_1.sim\sim_1\behav\firstone_vlog.prj

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