文件名称:UART1
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- 上传时间:2017-10-12
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文件大小:12.58mb
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已下载:0次
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基于Verilog的串口RS232控制器(RS232 controller of serial port based on Verilog)
相关搜索: Verilog-Uart
(系统自动生成,下载前可以参看下载内容)
下载文件列表
UART1
UART1\db
UART1\db\add_sub_g8j.tdf
UART1\db\add_sub_gvd.tdf
UART1\db\add_sub_o9j.tdf
UART1\db\add_sub_q9j.tdf
UART1\db\add_sub_r9j.tdf
UART1\db\add_sub_s9j.tdf
UART1\db\add_sub_t9j.tdf
UART1\db\add_sub_u9j.tdf
UART1\db\add_sub_v9j.tdf
UART1\db\altsyncram_0hq1.tdf
UART1\db\altsyncram_1go3.tdf
UART1\db\altsyncram_2ta1.tdf
UART1\db\altsyncram_3go3.tdf
UART1\db\altsyncram_4hq1.tdf
UART1\db\altsyncram_5761.tdf
UART1\db\altsyncram_acs3.tdf
UART1\db\altsyncram_cp14.tdf
UART1\db\altsyncram_d9s3.tdf
UART1\db\altsyncram_es14.tdf
UART1\db\altsyncram_g7p3.tdf
UART1\db\altsyncram_is14.tdf
UART1\db\altsyncram_jjo3.tdf
UART1\db\altsyncram_kdq1.tdf
UART1\db\altsyncram_mgq1.tdf
UART1\db\altsyncram_os14.tdf
UART1\db\altsyncram_pfs3.tdf
UART1\db\altsyncram_qgq1.tdf
UART1\db\altsyncram_rfo3.tdf
UART1\db\altsyncram_ss14.tdf
UART1\db\altsyncram_sta1.tdf
UART1\db\altsyncram_u8s3.tdf
UART1\db\altsyncram_vio3.tdf
UART1\db\cmpr_5cc.tdf
UART1\db\cmpr_6cc.tdf
UART1\db\cmpr_7cc.tdf
UART1\db\cmpr_9cc.tdf
UART1\db\cmpr_acc.tdf
UART1\db\cntr_0ci.tdf
UART1\db\cntr_1ci.tdf
UART1\db\cntr_2ci.tdf
UART1\db\cntr_3ci.tdf
UART1\db\cntr_45j.tdf
UART1\db\cntr_65j.tdf
UART1\db\cntr_74h.tdf
UART1\db\cntr_7ai.tdf
UART1\db\cntr_94h.tdf
UART1\db\cntr_d4h.tdf
UART1\db\cntr_gui.tdf
UART1\db\cntr_ikf.tdf
UART1\db\cntr_kkf.tdf
UART1\db\cntr_nkf.tdf
UART1\db\cntr_p6j.tdf
UART1\db\cntr_sbi.tdf
UART1\db\cntr_ubi.tdf
UART1\db\decode_1oa.tdf
UART1\db\decode_4oa.tdf
UART1\db\decode_rqf.tdf
UART1\db\ded_mult_n491.tdf
UART1\db\ded_mult_q491.tdf
UART1\db\ded_mult_s491.tdf
UART1\db\ded_mult_t491.tdf
UART1\db\dffpipe_73c.tdf
UART1\db\dffpipe_93c.tdf
UART1\db\dffpipe_a3c.tdf
UART1\db\dffpipe_d3c.tdf
UART1\db\logic_util_heursitic.dat
UART1\db\mult_add_035g.tdf
UART1\db\mult_add_135g.tdf
UART1\db\mult_add_145g.tdf
UART1\db\mult_add_245g.tdf
UART1\db\mult_add_335g.tdf
UART1\db\mult_add_445g.tdf
UART1\db\mult_add_t25g.tdf
UART1\db\mult_add_u35g.tdf
UART1\db\mux_0kb.tdf
UART1\db\mux_3kb.tdf
UART1\db\mux_boc.tdf
UART1\db\mux_doc.tdf
UART1\db\mux_foc.tdf
UART1\db\prev_cmp_serial1.qmsg
UART1\db\serial1.0.cmp.rdb
UART1\db\serial1.1.cmp.rdb
UART1\db\serial1.2.cmp.rdb
UART1\db\serial1.asm.qmsg
UART1\db\serial1.asm.rdb
UART1\db\serial1.asm_labs.ddb
UART1\db\serial1.autoh_e40e1.map.reg_db.cdb
UART1\db\serial1.autoh_e40e1.qmsg
UART1\db\serial1.autos_3e921.map.reg_db.cdb
UART1\db\serial1.autos_3e921.qmsg
UART1\db\serial1.cbx.xml
UART1\db\serial1.cmp.bpm
UART1\db\serial1.cmp.cdb
UART1\db\serial1.cmp.hdb
UART1\db\serial1.cmp.idb
UART1\db\serial1.cmp.kpt
UART1\db\serial1.cmp.logdb
UART1\db\serial1.cmp.rdb
UART1\db
UART1\db\add_sub_g8j.tdf
UART1\db\add_sub_gvd.tdf
UART1\db\add_sub_o9j.tdf
UART1\db\add_sub_q9j.tdf
UART1\db\add_sub_r9j.tdf
UART1\db\add_sub_s9j.tdf
UART1\db\add_sub_t9j.tdf
UART1\db\add_sub_u9j.tdf
UART1\db\add_sub_v9j.tdf
UART1\db\altsyncram_0hq1.tdf
UART1\db\altsyncram_1go3.tdf
UART1\db\altsyncram_2ta1.tdf
UART1\db\altsyncram_3go3.tdf
UART1\db\altsyncram_4hq1.tdf
UART1\db\altsyncram_5761.tdf
UART1\db\altsyncram_acs3.tdf
UART1\db\altsyncram_cp14.tdf
UART1\db\altsyncram_d9s3.tdf
UART1\db\altsyncram_es14.tdf
UART1\db\altsyncram_g7p3.tdf
UART1\db\altsyncram_is14.tdf
UART1\db\altsyncram_jjo3.tdf
UART1\db\altsyncram_kdq1.tdf
UART1\db\altsyncram_mgq1.tdf
UART1\db\altsyncram_os14.tdf
UART1\db\altsyncram_pfs3.tdf
UART1\db\altsyncram_qgq1.tdf
UART1\db\altsyncram_rfo3.tdf
UART1\db\altsyncram_ss14.tdf
UART1\db\altsyncram_sta1.tdf
UART1\db\altsyncram_u8s3.tdf
UART1\db\altsyncram_vio3.tdf
UART1\db\cmpr_5cc.tdf
UART1\db\cmpr_6cc.tdf
UART1\db\cmpr_7cc.tdf
UART1\db\cmpr_9cc.tdf
UART1\db\cmpr_acc.tdf
UART1\db\cntr_0ci.tdf
UART1\db\cntr_1ci.tdf
UART1\db\cntr_2ci.tdf
UART1\db\cntr_3ci.tdf
UART1\db\cntr_45j.tdf
UART1\db\cntr_65j.tdf
UART1\db\cntr_74h.tdf
UART1\db\cntr_7ai.tdf
UART1\db\cntr_94h.tdf
UART1\db\cntr_d4h.tdf
UART1\db\cntr_gui.tdf
UART1\db\cntr_ikf.tdf
UART1\db\cntr_kkf.tdf
UART1\db\cntr_nkf.tdf
UART1\db\cntr_p6j.tdf
UART1\db\cntr_sbi.tdf
UART1\db\cntr_ubi.tdf
UART1\db\decode_1oa.tdf
UART1\db\decode_4oa.tdf
UART1\db\decode_rqf.tdf
UART1\db\ded_mult_n491.tdf
UART1\db\ded_mult_q491.tdf
UART1\db\ded_mult_s491.tdf
UART1\db\ded_mult_t491.tdf
UART1\db\dffpipe_73c.tdf
UART1\db\dffpipe_93c.tdf
UART1\db\dffpipe_a3c.tdf
UART1\db\dffpipe_d3c.tdf
UART1\db\logic_util_heursitic.dat
UART1\db\mult_add_035g.tdf
UART1\db\mult_add_135g.tdf
UART1\db\mult_add_145g.tdf
UART1\db\mult_add_245g.tdf
UART1\db\mult_add_335g.tdf
UART1\db\mult_add_445g.tdf
UART1\db\mult_add_t25g.tdf
UART1\db\mult_add_u35g.tdf
UART1\db\mux_0kb.tdf
UART1\db\mux_3kb.tdf
UART1\db\mux_boc.tdf
UART1\db\mux_doc.tdf
UART1\db\mux_foc.tdf
UART1\db\prev_cmp_serial1.qmsg
UART1\db\serial1.0.cmp.rdb
UART1\db\serial1.1.cmp.rdb
UART1\db\serial1.2.cmp.rdb
UART1\db\serial1.asm.qmsg
UART1\db\serial1.asm.rdb
UART1\db\serial1.asm_labs.ddb
UART1\db\serial1.autoh_e40e1.map.reg_db.cdb
UART1\db\serial1.autoh_e40e1.qmsg
UART1\db\serial1.autos_3e921.map.reg_db.cdb
UART1\db\serial1.autos_3e921.qmsg
UART1\db\serial1.cbx.xml
UART1\db\serial1.cmp.bpm
UART1\db\serial1.cmp.cdb
UART1\db\serial1.cmp.hdb
UART1\db\serial1.cmp.idb
UART1\db\serial1.cmp.kpt
UART1\db\serial1.cmp.logdb
UART1\db\serial1.cmp.rdb
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