文件名称:Half-Adder
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- 上传时间:2017-11-23
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文件大小:21kb
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xilinx ISE平台提供1位半加法器,模块随模拟提供(Half- adder 1- bit design implemented in ISE XIlinx Design Suite. Module in VHDL language)
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下载文件列表
文件名 | 大小 | 更新时间 |
---|---|---|
Half-Adder\.lso | 6 | 2017-10-16 |
Half-Adder\Half-Adder.gise | 6740 | 2017-10-16 |
Half-Adder\Half-adder.vhd | 1452 | 2017-09-20 |
Half-Adder\Half-Adder.xise | 34452 | 2017-10-02 |
Half-Adder\Half-Adde_TB.vhd | 1067 | 2017-09-20 |
Half-Adder\Half.cmd_log | 450 | 2017-09-20 |
Half-Adder\Half.lso | 6 | 2017-09-20 |
Half-Adder\Half.prj | 28 | 2017-10-16 |
Half-Adder\Half.stx | 1300 | 2017-10-16 |
Half-Adder\Half.syr | 4195 | 2017-09-20 |
Half-Adder\Half.xst | 192 | 2017-10-16 |
Half-Adder\Half_envsettings.html | 8951 | 2017-10-16 |
Half-Adder\Half_summary.html | 4509 | 2017-10-16 |
Half-Adder\Half_vhdl.prj | 78 | 2017-10-16 |
Half-Adder\Half_xst.xrpt | 8297 | 2017-09-20 |
Half-Adder\iseconfig\Half-Adder.projectmgr | 4955 | 2017-10-16 |
Half-Adder\iseconfig\Half.xreport | 20420 | 2017-10-16 |
Half-Adder\pepExtractor.prj | 23 | 2017-09-20 |
Half-Adder\webtalk_pn.xml | 2676 | 2017-09-20 |
Half-Adder\xst\work\hdpdeps.ref | 6 | 2017-09-20 |
Half-Adder\_xmsgs\pn_parser.xmsgs | 1311 | 2017-10-16 |
Half-Adder\_xmsgs\xst.xmsgs | 976 | 2017-09-20 |
Half-Adder\xst\projnav.tmp | ||
Half-Adder\xst\work | ||
Half-Adder\ipcore_dir | ||
Half-Adder\iseconfig | ||
Half-Adder\xst | ||
Half-Adder\_xmsgs | ||
Half-Adder |
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