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文件名称:USB3_slavefifo

  • 所属分类：
    VHDL/FPGA/Verilog
  • 标签属性：
    [PDF]
  • 上传时间：
    2017-11-23
  • 文件大小：
    3.9mb
  • 已下载：
    0次
  • 提 供 者：
    iron*****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

支持自复位，板上测试通过。修改mode的取值可切换工作模式。(Support self reset. test passed.)
相关搜索： cyusb3014 slavefifo Xilinx

(系统自动生成,下载前可以参看下载内容)

下载文件列表

文件名大小更新时间
fpga_slavefifo\.Xil\PlanAhead-23372-LAPWIN7-KEAJ\ngc2edif\ngc2edif.log 442 2014-08-01
fpga_slavefifo\.Xil\PlanAhead-23372-LAPWIN7-KEAJ\ngc2edif\slaveFIFO2b_fpga_top.edif 763226 2014-08-01
fpga_slavefifo\.Xil\PlanAhead-23372-LAPWIN7-KEAJ\ngc2edif\_xmsgs\ngc2edif.xmsgs 532 2014-08-01
fpga_slavefifo\1.wcfg 9784 2017-11-17
fpga_slavefifo\clk_wiz_v3_2_2.v 5569 2013-02-18
fpga_slavefifo\fifo.v 3951 2013-02-13
fpga_slavefifo\fuse.log 3964 2017-11-22
fpga_slavefifo\fuse.xmsgs 976 2017-11-22
fpga_slavefifo\fuseRelaunch.cmd 422 2017-11-22
fpga_slavefifo\ipcore_dir\coregen.cgp 238 2017-11-16
fpga_slavefifo\ipcore_dir\coregen.log 2195 2017-04-30
fpga_slavefifo\ipcore_dir\create_fifo_new.tcl 1269 2014-12-01
fpga_slavefifo\ipcore_dir\create_pll.tcl 1252 2014-12-01
fpga_slavefifo\ipcore_dir\create_ram_4096.tcl 1279 2014-12-01
fpga_slavefifo\ipcore_dir\edit_fifo_new.tcl 1124 2014-12-01
fpga_slavefifo\ipcore_dir\edit_pll.tcl 1119 2017-04-30
fpga_slavefifo\ipcore_dir\edit_ram_4096.tcl 1124 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\doc\fifo_generator_v9_3_readme.txt 9862 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\doc\fifo_generator_v9_3_vinfo.html 10447 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\doc\pg057-fifo-generator.pdf 75348 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\example_design\fifo_new_exdes.ucf 2781 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\example_design\fifo_new_exdes.vhd 5213 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\fifo_generator_v9_3_readme.txt 9862 2013-10-14
fpga_slavefifo\ipcore_dir\fifo_new\implement\implement.bat 3342 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\implement\implement.sh 3250 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\implement\implement_synplify.bat 3358 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\implement\implement_synplify.sh 3268 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\implement\planAhead_ise.bat 2629 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\implement\planAhead_ise.sh 2580 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\implement\planAhead_ise.tcl 3143 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\implement\xst.prj 43 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\implement\xst.scr 226 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\fifo_new_dgen.vhd 4649 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\fifo_new_dverif.vhd 5651 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\fifo_new_pctrl.vhd 18818 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\fifo_new_pkg.vhd 11700 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\fifo_new_rng.vhd 3987 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\fifo_new_synth.vhd 11261 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\fifo_new_tb.vhd 6264 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\functional\simulate_isim.bat 2956 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\functional\simulate_isim.sh 2987 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\functional\simulate_mti.bat 2294 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\functional\simulate_mti.do 3068 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\functional\simulate_mti.sh 2343 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\functional\simulate_ncsim.bat 3046 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\functional\simulate_vcs.bat 2951 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\functional\ucli_commands.key 70 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\functional\vcs_session.tcl 3657 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\functional\wave_isim.tcl 3092 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\functional\wave_mti.do 4011 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\functional\wave_ncsim.sv 3373 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\timing\simulate_isim.bat 2930 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\timing\simulate_isim.sh 2962 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\timing\simulate_mti.bat 2294 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\timing\simulate_mti.do 3069 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\timing\simulate_mti.sh 2343 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\timing\simulate_ncsim.bat 3261 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\timing\simulate_vcs.bat 2973 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\timing\ucli_commands.key 70 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\timing\vcs_session.tcl 3655 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\timing\wave_isim.tcl 3092 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\timing\wave_mti.do 4011 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new\simulation\timing\wave_ncsim.sv 3373 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new.asy 884 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new.gise 2602 2016-08-14
fpga_slavefifo\ipcore_dir\fifo_new.ncf
fpga_slavefifo\ipcore_dir\fifo_new.ngc 82720 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new.sym 2427 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new.v 14179 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new.veo 4546 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new.xco 7314 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new.xise 4899 2016-08-07
fpga_slavefifo\ipcore_dir\fifo_new_flist.txt 2174 2014-12-01
fpga_slavefifo\ipcore_dir\fifo_new_xmdf.tcl 11532 2014-12-01
fpga_slavefifo\ipcore_dir\pll\clk_wiz_v3_6_readme.txt 6131 2013-10-14
fpga_slavefifo\ipcore_dir\pll\doc\clk_wiz_v3_6_readme.txt 6131 2017-04-30
fpga_slavefifo\ipcore_dir\pll\doc\clk_wiz_v3_6_vinfo.html 6789 2017-04-30
fpga_slavefifo\ipcore_dir\pll\doc\pg065_clk_wiz.pdf 42657 2017-04-30
fpga_slavefifo\ipcore_dir\pll\example_design\pll_exdes.ucf 2635 2017-04-30
fpga_slavefifo\ipcore_dir\pll\example_design\pll_exdes.v 6068 2017-04-30
fpga_slavefifo\ipcore_dir\pll\example_design\pll_exdes.xdc 3151 2017-04-30
fpga_slavefifo\ipcore_dir\pll\implement\implement.bat 3598 2017-04-30
fpga_slavefifo\ipcore_dir\pll\implement\implement.sh 3477 2017-04-30
fpga_slavefifo\ipcore_dir\pll\implement\planAhead_ise.bat 2695 2017-04-30
fpga_slavefifo\ipcore_dir\pll\implement\planAhead_ise.sh 2603 2017-04-30
fpga_slavefifo\ipcore_dir\pll\implement\planAhead_ise.tcl 3065 2017-04-30
fpga_slavefifo\ipcore_dir\pll\implement\planAhead_rdn.bat 2690 2017-04-30
fpga_slavefifo\ipcore_dir\pll\implement\planAhead_rdn.sh 2595 2017-04-30
fpga_slavefifo\ipcore_dir\pll\implement\planAhead_rdn.tcl 3159 2017-04-30
fpga_slavefifo\ipcore_dir\pll\implement\xst.prj 70 2017-04-30
fpga_slavefifo\ipcore_dir\pll\implement\xst.scr 162 2017-04-30
fpga_slavefifo\ipcore_dir\pll\simulation\functional\simcmds.tcl 139 2017-04-30
fpga_slavefifo\ipcore_dir\pll\simulation\functional\simulate_isim.bat 2732 2017-04-30
fpga_slavefifo\ipcore_dir\pll\simulation\functional\simulate_isim.sh 2615 2017-04-30
fpga_slavefifo\ipcore_dir\pll\simulation\functional\simulate_mti.bat 2739 2017-04-30
fpga_slavefifo\ipcore_dir\pll\simulation\functional\simulate_mti.do 2652 2017-04-30
fpga_slavefifo\ipcore_dir\pll\simulation\functional\simulate_mti.sh 2609 2017-04-30
fpga_slavefifo\ipcore_dir\pll\simulation\functional\simulate_ncsim.sh 2730 2017-04-30
fpga_slavefifo\ipcore_dir\pll\simulation\functional\simulate_vcs.sh 2880 2017-04-30
fpga_slavefifo\ipcore_dir\pll\simulation\functional\ucli_commands.key 94 2017-04-30

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