文件名称:Meher_2014.pdf.tar
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his work describes an approximate DCT architec-
ture for the High Efficiency Video Coding (HEVC) standard.
Since the standard requires to support multiple block sizes,
architectures based on exact implementation require a relevant
amount of hardware resources, namely multipliers and adders.
This work aims to reduce the amount of hardware resources
while keeping the rate-distortion performance nearly optimal.
ture for the High Efficiency Video Coding (HEVC) standard.
Since the standard requires to support multiple block sizes,
architectures based on exact implementation require a relevant
amount of hardware resources, namely multipliers and adders.
This work aims to reduce the amount of hardware resources
while keeping the rate-distortion performance nearly optimal.
相关搜索： hevc
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| 文件名 | 大小 | 更新时间 |
|---|---|---|
| 895c5edb06b627b3c5b78537b406b3e5 | 2088960 | 2017-12-25 |
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