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文件名称:5L_SVPWM_ANPC_CPLD

  • 所属分类：
    VHDL/FPGA/Verilog
  • 标签属性：
    [HTML]
  • 上传时间：
    2018-01-09
  • 文件大小：
    327kb
  • 已下载：
    0次
  • 提 供 者：
    hu***
  • 相关连接：
    无
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    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

基于CPLD硬件描述语言编写的五电平SVPWM脉冲触发程序(Five level SVPWM pulse trigger program based on CPLD hardware descr iption language)
相关搜索： 五电平SVPWM CPLD

(系统自动生成,下载前可以参看下载内容)

下载文件列表

文件名大小更新时间
5L_SVPWM_ANPC_CPLD\.pplq.rdb 245 2016-11-07
5L_SVPWM_ANPC_CPLD\db\logic_util_heursitic.dat 0 2017-03-31
5L_SVPWM_ANPC_CPLD\db\prev_cmp_threelvlanpc.asm.qmsg 2242 2016-11-07
5L_SVPWM_ANPC_CPLD\db\prev_cmp_threelvlanpc.eda.qmsg 2250 2016-11-07
5L_SVPWM_ANPC_CPLD\db\prev_cmp_threelvlanpc.fit.qmsg 12555 2016-11-07
5L_SVPWM_ANPC_CPLD\db\prev_cmp_threelvlanpc.map.qmsg 11791 2016-11-07
5L_SVPWM_ANPC_CPLD\db\prev_cmp_threelvlanpc.qmsg 36270 2016-11-07
5L_SVPWM_ANPC_CPLD\db\prev_cmp_threelvlanpc.tan.qmsg 7200 2016-11-07
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.(0).cnf.cdb 6117 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.(0).cnf.hdb 2389 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.cbx.xml 94 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.cmp.cdb 4382 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.cmp.hdb 11607 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.cmp.logdb 4 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.cmp.rdb 6882 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.db_info 155 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.fit.qmsg 2356 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.hier_info 3540 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.hif 438 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.ipinfo 178 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.lpc.html 372 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.lpc.rdb 414 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.lpc.txt 1060 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.map.cdb 4379 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.map.hdb 11594 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.map.logdb 4 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.map.qmsg 19345 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.map.rdb 1237 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.pplq.rdb 246 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.pre_map.hdb 12006 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.pti_db_list.ddb 192 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.root_partition.map.reg_db.cdb 217 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.rtlv.hdb 11928 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.rtlv_sg.cdb 6652 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.rtlv_sg_swap.cdb 196 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.sgdiff.cdb 6356 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.sgdiff.hdb 12025 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.sld_design_entry.sci 217 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.sld_design_entry_dsc.sci 217 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.smart_action.txt 5 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.syn_hier_info 0 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.tis_db_list.ddb 192 2017-03-31
5L_SVPWM_ANPC_CPLD\db\threelvlanpc.tmw_info 113 2017-03-31
5L_SVPWM_ANPC_CPLD\incremental_db\compiled_partitions\threelvlanpc.db_info 155 2016-11-21
5L_SVPWM_ANPC_CPLD\incremental_db\compiled_partitions\threelvlanpc.root_partition.map.kpt 225 2017-03-31
5L_SVPWM_ANPC_CPLD\incremental_db\README 653 2016-11-07
5L_SVPWM_ANPC_CPLD\output_files\threelvlanpc.asm.rpt 6921 2016-11-07
5L_SVPWM_ANPC_CPLD\output_files\threelvlanpc.cdf 412 2016-11-21
5L_SVPWM_ANPC_CPLD\output_files\threelvlanpc.done 26 2016-11-07
5L_SVPWM_ANPC_CPLD\output_files\threelvlanpc.eda.rpt 5749 2016-11-07
5L_SVPWM_ANPC_CPLD\output_files\threelvlanpc.fit.rpt 11764 2017-03-31
5L_SVPWM_ANPC_CPLD\output_files\threelvlanpc.fit.smsg 370 2016-11-07
5L_SVPWM_ANPC_CPLD\output_files\threelvlanpc.fit.summary 345 2017-03-31
5L_SVPWM_ANPC_CPLD\output_files\threelvlanpc.flow.rpt 6824 2017-03-31
5L_SVPWM_ANPC_CPLD\output_files\threelvlanpc.jdi 21 2016-11-07
5L_SVPWM_ANPC_CPLD\output_files\threelvlanpc.map.rpt 28845 2017-03-31
5L_SVPWM_ANPC_CPLD\output_files\threelvlanpc.map.smsg 134 2016-11-07
5L_SVPWM_ANPC_CPLD\output_files\threelvlanpc.map.summary 328 2017-03-31
5L_SVPWM_ANPC_CPLD\output_files\threelvlanpc.pin 20326 2016-11-07
5L_SVPWM_ANPC_CPLD\output_files\threelvlanpc.pof 27326 2016-11-07
5L_SVPWM_ANPC_CPLD\output_files\threelvlanpc.sta.rpt 73146 2016-11-07
5L_SVPWM_ANPC_CPLD\output_files\threelvlanpc.sta.summary 972 2016-11-07
5L_SVPWM_ANPC_CPLD\output_files\threelvlanpc.tan.rpt 7030 2016-11-07
5L_SVPWM_ANPC_CPLD\output_files\threelvlanpc.tan.summary 717 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\modelsim\threelvlanpc.sft 43 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\modelsim\threelvlanpc.vo 41201 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\modelsim\threelvlanpc_modelsim.xrf 4194 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\modelsim\threelvlanpc_v.sdo 112880 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\modelsim\Waveform.vwf.do 821 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\modelsim\Waveform.vwf.vt 8126 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\threelvlanpc.do 380 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\threelvlanpc.msim.vcd 45872 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\threelvlanpc.msim.vwf 213405 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\threelvlanpc.sim.vwf 45316 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\threelvlanpc.vo 120869 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\threelvlanpc.vt 9700 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\threelvlanpc_v.sdo 112880 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\threelvlanpc_v.sdo_typ.csd 19567 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\transcript 1403 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\vsim.wlf 73728 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\work\threelvlanpc\verilog.prw 1281 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\work\threelvlanpc\verilog.psm 364560 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\work\threelvlanpc\_primary.dat 72987 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\work\threelvlanpc\_primary.dbs 79714 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\work\threelvlanpc\_primary.vhd 601 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\work\threelvlanpc_vlg_check_tst\verilog.prw 1765 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\work\threelvlanpc_vlg_check_tst\verilog.psm 34832 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\work\threelvlanpc_vlg_check_tst\_primary.dat 4177 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\work\threelvlanpc_vlg_check_tst\_primary.dbs 2962 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\work\threelvlanpc_vlg_check_tst\_primary.vhd 443 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\work\threelvlanpc_vlg_sample_tst\verilog.prw 368 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\work\threelvlanpc_vlg_sample_tst\verilog.psm 6456 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\work\threelvlanpc_vlg_sample_tst\_primary.dat 567 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\work\threelvlanpc_vlg_sample_tst\_primary.dbs 692 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\work\threelvlanpc_vlg_sample_tst\_primary.vhd 402 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\work\threelvlanpc_vlg_vec_tst\verilog.prw 1285 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\work\threelvlanpc_vlg_vec_tst\verilog.psm 12808 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\work\threelvlanpc_vlg_vec_tst\_primary.dat 1447 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\work\threelvlanpc_vlg_vec_tst\_primary.dbs 1855 2016-11-07
5L_SVPWM_ANPC_CPLD\simulation\qsim\work\threelvlanpc_vlg_vec_tst\_primary.vhd 108 2016-11-07

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