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文件名称:CPU

  • 所属分类：
    其他
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    [PDF]
  • 上传时间：
    2018-03-23
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    4.72mb
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    yea***
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基于ARM指令集自主进行CPU设计体验，第一版(Independent CPU design experience based on ARM instruction set, first edition)
相关搜索： 基于ARM指令的CPU设计

(系统自动生成,下载前可以参看下载内容)

下载文件列表

文件名大小更新时间
CPU\ALU.v 305 2017-05-15
CPU\blk_mem_gen_v7_3.mif 342 2017-05-17
CPU\cpu.bgn 7839 2017-05-22
CPU\cpu.bit 340989 2017-05-22
CPU\CPU.bld 1080 2017-05-22
CPU\CPU.cmd_log 25025 2017-08-07
CPU\cpu.drc 764 2017-05-22
CPU\CPU.gise 19645 2017-08-08
CPU\CPU.lso 6 2017-08-07
CPU\CPU.ncd 271818 2017-05-22
CPU\CPU.ngc 262911 2017-08-07
CPU\CPU.ngd 397448 2017-05-22
CPU\CPU.ngr 458354 2017-08-07
CPU\CPU.pad 7086 2017-05-22
CPU\CPU.par 8727 2017-05-22
CPU\CPU.pcf 810 2017-05-22
CPU\CPU.prj 160 2017-08-07
CPU\CPU.ptwx 17509 2017-05-22
CPU\CPU.stx 0 2017-08-07
CPU\CPU.syr 37984 2017-08-07
CPU\CPU.twr 3800 2017-05-22
CPU\CPU.twx 20894 2017-05-22
CPU\CPU.unroutes 161 2017-05-22
CPU\CPU.ut 553 2017-05-22
CPU\CPU.v 1202 2017-08-07
CPU\CPU.xise 38968 2017-08-07
CPU\CPU.xpi 46 2017-05-22
CPU\CPU.xst 1080 2017-08-07
CPU\CPU_bitgen.xwbt 173 2017-05-22
CPU\CPU_envsettings.html 19556 2017-08-08
CPU\CPU_guide.ncd 271818 2017-05-22
CPU\CPU_map.map 7920 2017-05-22
CPU\CPU_map.mrp 11160 2017-05-22
CPU\CPU_map.ncd 125550 2017-05-22
CPU\CPU_map.ngm 692303 2017-05-22
CPU\CPU_map.xrpt 25388 2017-05-22
CPU\CPU_ngdbuild.xrpt 10231 2017-05-22
CPU\CPU_pad.csv 7118 2017-05-22
CPU\CPU_pad.txt 29487 2017-05-22
CPU\CPU_par.xrpt 82646 2017-05-22
CPU\CPU_RAM_Initial.coe 659 2017-05-17
CPU\cpu_show.ucf 2633 2017-05-17
CPU\CPU_summary.html 6424 2017-08-08
CPU\CPU_summary.xml 409 2017-05-22
CPU\cpu_testbench.v 406 2017-05-17
CPU\cpu_testbench_beh.prj 277 2017-05-22
CPU\cpu_testbench_isim_beh.exe 94720 2017-05-22
CPU\cpu_testbench_isim_beh.wdb 58940204 2017-05-22
CPU\cpu_testbench_isim_beh1.wdb 51803442 2017-05-16
CPU\CPU_usage.xml 62884 2017-05-22
CPU\CPU_xst.xrpt 15851 2017-08-07
CPU\FSM.lso 6 2017-08-07
CPU\FSM.prj 22 2017-08-07
CPU\FSM.stx 1607 2017-08-07
CPU\FSM.v 3114 2017-05-17
CPU\FSM.xst 1090 2017-08-07
CPU\FSM_isim_beh.exe 94720 2017-05-12
CPU\FSM_tb.v 0 2017-05-12
CPU\fuse.log 1750 2017-05-22
CPU\fuse.xmsgs 367 2017-05-22
CPU\fuseRelaunch.cmd 219 2017-05-22
CPU\ipcore_dir\blk_mem_gen_v7_3\blk_mem_gen_v7_3_readme.txt 7721 2013-10-14
CPU\ipcore_dir\blk_mem_gen_v7_3\doc\blk_mem_gen_v7_3_vinfo.html 8311 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\doc\pg058-blk-mem-gen.pdf 7207569 2013-10-14
CPU\ipcore_dir\blk_mem_gen_v7_3\example_design\blk_mem_gen_v7_3_exdes.ucf 2684 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\example_design\blk_mem_gen_v7_3_exdes.vhd 4822 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\example_design\blk_mem_gen_v7_3_exdes.xdc 2654 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\example_design\blk_mem_gen_v7_3_prod.vhd 10397 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\implement\implement.bat 1103 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\implement\implement.sh 1086 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\implement\planAhead_ise.bat 2693 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\implement\planAhead_ise.sh 2588 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\implement\planAhead_ise.tcl 3214 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\implement\xst.prj 51 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\implement\xst.scr 240 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\simulation\addr_gen.vhd 4526 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\simulation\blk_mem_gen_v7_3_synth.vhd 8218 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\simulation\blk_mem_gen_v7_3_tb.vhd 4504 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\simulation\bmg_stim_gen.vhd 7809 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\simulation\bmg_tb_pkg.vhd 6206 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\simulation\checker.vhd 5768 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\simulation\data_gen.vhd 5164 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\simulation\functional\simcmds.tcl 2719 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\simulation\functional\simulate_isim.bat 3154 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\simulation\functional\simulate_mti.bat 114 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\simulation\functional\simulate_mti.do 3197 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\simulation\functional\simulate_mti.sh 114 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\simulation\functional\simulate_ncsim.sh 3183 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\simulation\functional\simulate_vcs.sh 3033 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\simulation\functional\ucli_commands.key 77 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\simulation\functional\vcs_session.tcl 3593 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\simulation\functional\wave_mti.do 1112 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\simulation\functional\wave_ncsim.sv 702 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\simulation\random.vhd 4220 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\simulation\timing\simcmds.tcl 2719 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\simulation\timing\simulate_isim.bat 3070 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\simulation\timing\simulate_mti.bat 114 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\simulation\timing\simulate_mti.do 3222 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\simulation\timing\simulate_mti.sh 114 2017-05-17
CPU\ipcore_dir\blk_mem_gen_v7_3\simulation\timing\simulate_ncsim.sh 3352 2017-05-17

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