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文件名称:5_uart_test

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  • 上传时间:
    2018-03-24
  • 文件大小:
    770kb
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基于xilinx的Artix7实现UART通信(UART communication based on Xilinx Artix7)
相关搜索: UART Xilinx vhdl

(系统自动生成,下载前可以参看下载内容)

下载文件列表

文件名大小更新时间
5_uart_test 0 2018-03-24
5_uart_test\uart_test 0 2018-03-24
5_uart_test\uart_test\.Xil 0 2018-03-24
5_uart_test\uart_test\constrs_1 0 2018-03-24
5_uart_test\uart_test\constrs_1\new 0 2018-03-24
5_uart_test\uart_test\constrs_1\new\uart.xdc 614 2017-04-26
5_uart_test\uart_test\src 0 2018-03-24
5_uart_test\uart_test\src\clkdiv.v 767 2017-02-07
5_uart_test\uart_test\src\uart_test.v 2681 2017-01-14
5_uart_test\uart_test\src\uartctrl.v 5072 2017-01-14
5_uart_test\uart_test\src\uartrx.v 4244 2017-01-14
5_uart_test\uart_test\src\uarttx.v 3778 2017-01-14
5_uart_test\uart_test\uart_test.cache 0 2018-03-24
5_uart_test\uart_test\uart_test.cache\compile_simlib 0 2018-03-24
5_uart_test\uart_test\uart_test.cache\compile_simlib\activehdl 0 2018-03-24
5_uart_test\uart_test\uart_test.cache\compile_simlib\ies 0 2018-03-24
5_uart_test\uart_test\uart_test.cache\compile_simlib\modelsim 0 2018-03-24
5_uart_test\uart_test\uart_test.cache\compile_simlib\questa 0 2018-03-24
5_uart_test\uart_test\uart_test.cache\compile_simlib\riviera 0 2018-03-24
5_uart_test\uart_test\uart_test.cache\compile_simlib\vcs 0 2018-03-24
5_uart_test\uart_test\uart_test.cache\wt 0 2018-03-24
5_uart_test\uart_test\uart_test.cache\wt\gui_resources.wdf 4255 2017-09-04
5_uart_test\uart_test\uart_test.cache\wt\java_command_handlers.wdf 2224 2017-09-04
5_uart_test\uart_test\uart_test.cache\wt\project.wpc 123 2017-09-04
5_uart_test\uart_test\uart_test.cache\wt\synthesis.wdf 5394 2017-09-04
5_uart_test\uart_test\uart_test.cache\wt\synthesis_details.wdf 100 2017-09-04
5_uart_test\uart_test\uart_test.cache\wt\webtalk_pa.xml 5107 2017-09-04
5_uart_test\uart_test\uart_test.hw 0 2018-03-24
5_uart_test\uart_test\uart_test.hw\hw_1 0 2018-03-24
5_uart_test\uart_test\uart_test.hw\hw_1\hw.xml 1493 2017-09-04
5_uart_test\uart_test\uart_test.hw\hw_1\layout 0 2018-03-24
5_uart_test\uart_test\uart_test.hw\hw_1\layout\hw_ila_1.layout 247235 2017-04-26
5_uart_test\uart_test\uart_test.hw\hw_1\wave 0 2018-03-24
5_uart_test\uart_test\uart_test.hw\uart1_test.lpr 343 2017-01-14
5_uart_test\uart_test\uart_test.hw\uart_test.lpr 343 2017-01-14
5_uart_test\uart_test\uart_test.hw\webtalk 0 2018-03-24
5_uart_test\uart_test\uart_test.hw\webtalk\.xsim_webtallk.info 59 2017-07-21
5_uart_test\uart_test\uart_test.hw\webtalk\labtool_webtalk.log 395 2017-07-21
5_uart_test\uart_test\uart_test.hw\webtalk\usage_statistics_ext_labtool.html 3406 2017-07-21
5_uart_test\uart_test\uart_test.hw\webtalk\usage_statistics_ext_labtool.xml 2966 2017-07-21
5_uart_test\uart_test\uart_test.ip_user_files 0 2018-03-24
5_uart_test\uart_test\uart_test.ip_user_files\ipstatic 0 2018-03-24
5_uart_test\uart_test\uart_test.runs 0 2018-03-24
5_uart_test\uart_test\uart_test.runs\.jobs 0 2018-03-24
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_1.xml 452 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_10.xml 255 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_11.xml 452 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_12.xml 255 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_13.xml 452 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_14.xml 255 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_15.xml 450 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_16.xml 254 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_17.xml 450 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_18.xml 254 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_19.xml 466 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_2.xml 255 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_20.xml 255 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_21.xml 466 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_22.xml 466 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_23.xml 262 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_24.xml 255 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_25.xml 469 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_26.xml 466 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_27.xml 262 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_28.xml 255 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_29.xml 469 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_3.xml 452 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_30.xml 255 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_31.xml 469 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_32.xml 494 2017-02-07
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_33.xml 255 2017-02-07
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_34.xml 262 2017-02-07
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_35.xml 251 2017-04-26
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_36.xml 461 2017-04-26
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_37.xml 428 2017-09-04
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_38.xml 243 2017-09-04
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_39.xml 243 2017-09-04
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_4.xml 255 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_40.xml 243 2017-09-04
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_5.xml 452 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_6.xml 452 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_7.xml 255 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_8.xml 255 2017-01-14
5_uart_test\uart_test\uart_test.runs\.jobs\vrs_config_9.xml 452 2017-01-14
5_uart_test\uart_test\uart_test.runs\impl_1 0 2018-03-24
5_uart_test\uart_test\uart_test.runs\impl_1\.Vivado_Implementation.queue.rst 0 2017-09-04
5_uart_test\uart_test\uart_test.runs\impl_1\.Xil 0 2018-03-24
5_uart_test\uart_test\uart_test.runs\impl_1\.init_design.begin.rst 186 2017-09-04
5_uart_test\uart_test\uart_test.runs\impl_1\.init_design.end.rst 0 2017-09-04
5_uart_test\uart_test\uart_test.runs\impl_1\.opt_design.begin.rst 186 2017-09-04
5_uart_test\uart_test\uart_test.runs\impl_1\.opt_design.end.rst 0 2017-09-04
5_uart_test\uart_test\uart_test.runs\impl_1\.place_design.begin.rst 186 2017-09-04
5_uart_test\uart_test\uart_test.runs\impl_1\.place_design.end.rst 0 2017-09-04
5_uart_test\uart_test\uart_test.runs\impl_1\.route_design.begin.rst 186 2017-09-04
5_uart_test\uart_test\uart_test.runs\impl_1\.route_design.end.rst 0 2017-09-04
5_uart_test\uart_test\uart_test.runs\impl_1\.vivado.begin.rst 185 2017-09-04
5_uart_test\uart_test\uart_test.runs\impl_1\.vivado.end.rst 0 2017-09-04
5_uart_test\uart_test\uart_test.runs\impl_1\.write_bitstream.begin.rst 186 2017-09-04
5_uart_test\uart_test\uart_test.runs\impl_1\.write_bitstream.end.rst 0 2017-09-04
5_uart_test\uart_test\uart_test.runs\impl_1\ISEWrap.js 7308 2017-09-04

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