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文件名称:lzs-master

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    2018-08-02
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    427kb
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基于verilog的LZS压缩和解压算法,压缩比1;2 。里面带有C原言的代码。已经通过验证!(Verilog based LZS compression and decompression algorithm, compression ratio 1; 2. It has the C code in it. It has been verified!)
(系统自动生成,下载前可以参看下载内容)

下载文件列表

文件名大小更新时间
lzs-master 0 2013-02-13
lzs-master\LICENSE.GPL 18011 2013-02-13
lzs-master\Makefile 140 2013-02-13
lzs-master\common 0 2013-02-13
lzs-master\common\fifo_control.v 12829 2013-02-13
lzs-master\common\synchronizer_flop.v 5230 2013-02-13
lzs-master\common\tpram.v 12738 2013-02-13
lzs-master\decode 0 2013-02-13
lzs-master\decode\bench 0 2013-02-13
lzs-master\decode\bench\verilog 0 2013-02-13
lzs-master\decode\bench\verilog\Makefile 629 2013-02-13
lzs-master\decode\bench\verilog\tb.dino 1403 2013-02-13
lzs-master\decode\bench\verilog\tb.v 5172 2013-02-13
lzs-master\decode\bench\verilog\tb_data.v 3786 2013-02-13
lzs-master\decode\rtl 0 2013-02-13
lzs-master\decode\rtl\verilog 0 2013-02-13
lzs-master\decode\rtl\verilog\decode.v 3429 2013-02-13
lzs-master\decode\rtl\verilog\decode_ctl.v 6085 2013-02-13
lzs-master\decode\rtl\verilog\decode_in.v 2728 2013-02-13
lzs-master\decode\rtl\verilog\decode_out.v 1418 2013-02-13
lzs-master\decode\rtl\verilog\generic_tpram.v 9125 2013-02-13
lzs-master\docs 0 2013-02-13
lzs-master\docs\decode.pdf 149479 2013-02-13
lzs-master\docs\decode.tex 2823 2013-02-13
lzs-master\docs\encode.pdf 149588 2013-02-13
lzs-master\docs\encode.tex 3712 2013-02-13
lzs-master\docs\lzs.pdf 24952 2013-02-13
lzs-master\docs\pdl_std.html 19573 2013-02-13
lzs-master\docs\rfc1974.txt 45267 2013-02-13
lzs-master\edk 0 2013-02-13
lzs-master\edk\pcores 0 2013-02-13
lzs-master\edk\pcores\plbv46_wrapper_v1_00_a 0 2013-02-13
lzs-master\edk\pcores\plbv46_wrapper_v1_00_a\data 0 2013-02-13
lzs-master\edk\pcores\plbv46_wrapper_v1_00_a\data\plbv46_wrapper_v2_1_0.mpd 7176 2013-02-13
lzs-master\edk\pcores\plbv46_wrapper_v1_00_a\data\plbv46_wrapper_v2_1_0.pao 191 2013-02-13
lzs-master\edk\pcores\plbv46_wrapper_v1_00_a\hdl 0 2013-02-13
lzs-master\edk\pcores\plbv46_wrapper_v1_00_a\hdl\vhdl 0 2013-02-13
lzs-master\edk\pcores\plbv46_wrapper_v1_00_a\hdl\vhdl\plbv46_wrapper.vhd 15028 2013-02-13
lzs-master\edk\simulation 0 2013-02-13
lzs-master\edk\simulation\behavioral 0 2013-02-13
lzs-master\edk\simulation\behavioral\system_tb.v 6490 2013-02-13
lzs-master\edk\system.mhs 8562 2013-02-13
lzs-master\edk\system.mss 6 2013-02-13
lzs-master\edk\system.xmp 543 2013-02-13
lzs-master\edk\systemc 0 2013-02-13
lzs-master\edk\systemc\lldma.cpp 13188 2013-02-13
lzs-master\edk\systemc\run.do 176 2013-02-13
lzs-master\edk\systemc\wave.do 3807 2013-02-13
lzs-master\encode 0 2013-02-13
lzs-master\encode\bench 0 2013-02-13
lzs-master\encode\bench\verilog 0 2013-02-13
lzs-master\encode\bench\verilog\Makefile 352 2013-02-13
lzs-master\encode\bench\verilog\data.v 4134 2013-02-13
lzs-master\encode\bench\verilog\tb.dino 1966 2013-02-13
lzs-master\encode\bench\verilog\top.v 4110 2013-02-13
lzs-master\encode\rtl 0 2013-02-13
lzs-master\encode\rtl\verilog 0 2013-02-13
lzs-master\encode\rtl\verilog\SUMMARY.txt 1083 2013-02-13
lzs-master\encode\rtl\verilog\encode.v 4079 2013-02-13
lzs-master\encode\rtl\verilog\encode_ctl.v 9798 2013-02-13
lzs-master\encode\rtl\verilog\encode_dp.v 5792 2013-02-13
lzs-master\encode\rtl\verilog\encode_out.v 2556 2013-02-13
lzs-master\jhash 0 2013-02-13
lzs-master\jhash\Makefile 59 2013-02-13
lzs-master\jhash\bench 0 2013-02-13
lzs-master\jhash\bench\verilog 0 2013-02-13
lzs-master\jhash\bench\verilog\Makefile 948 2013-02-13
lzs-master\jhash\bench\verilog\tb.v 3419 2013-02-13
lzs-master\jhash\bench\verilog\tb_in.dino 966 2013-02-13
lzs-master\jhash\bench\verilog\tb_in.v 3119 2013-02-13
lzs-master\jhash\lookup3_v.c 35698 2013-02-13
lzs-master\jhash\rtl 0 2013-02-13
lzs-master\jhash\rtl\verilog 0 2013-02-13
lzs-master\jhash\rtl\verilog\jhash.v 2825 2013-02-13
lzs-master\jhash\rtl\verilog\jhash_core.v 4478 2013-02-13
lzs-master\jhash\rtl\verilog\jhash_in.v 3160 2013-02-13
lzs-master\jhash\rtl\verilog\lookup3.v 2296 2013-02-13
lzs-master\jhash\rtl\verilog\mix.v 344 2013-02-13
lzs-master\liblzs.c 14745 2013-02-13
lzs-master\liblzs.h 263 2013-02-13
lzs-master\lzs.c 2668 2013-02-13
lzs-master\pcores 0 2013-02-13
lzs-master\pcores\comp_unit_v1_00_a 0 2013-02-13
lzs-master\pcores\comp_unit_v1_00_a\bxst 1163 2013-02-13
lzs-master\pcores\comp_unit_v1_00_a\data 0 2013-02-13
lzs-master\pcores\comp_unit_v1_00_a\data\comp_unit_v2_1_0.mpd 2878 2013-02-13
lzs-master\pcores\comp_unit_v1_00_a\data\comp_unit_v2_1_0.pao 1164 2013-02-13
lzs-master\pcores\comp_unit_v1_00_a\data\comp_unit_v2_1_0.tcl 1803 2013-02-13
lzs-master\pcores\comp_unit_v1_00_a\hdl 0 2013-02-13
lzs-master\pcores\comp_unit_v1_00_a\hdl\verilog 0 2013-02-13
lzs-master\pcores\comp_unit_v1_00_a\hdl\verilog\ch.v 6814 2013-02-13
lzs-master\pcores\comp_unit_v1_00_a\hdl\verilog\ch_fifo.v 5421 2013-02-13
lzs-master\pcores\comp_unit_v1_00_a\hdl\verilog\codeout.v 2895 2013-02-13
lzs-master\pcores\comp_unit_v1_00_a\hdl\verilog\comp_copy.v 13218 2013-02-13
lzs-master\pcores\comp_unit_v1_00_a\hdl\verilog\comp_unit.v 25538 2013-02-13
lzs-master\pcores\comp_unit_v1_00_a\hdl\verilog\copy.v 2305 2013-02-13
lzs-master\pcores\comp_unit_v1_00_a\hdl\verilog\crc.v 8182 2013-02-13
lzs-master\pcores\comp_unit_v1_00_a\hdl\verilog\dbgcnt.v 681 2013-02-13
lzs-master\pcores\comp_unit_v1_00_a\hdl\verilog\decode.v 39 2013-02-13
lzs-master\pcores\comp_unit_v1_00_a\hdl\verilog\decode_ctl.v 43 2013-02-13

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