文件名称:cic1s2
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- 上传时间:2008-10-13
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文件大小:487.44kb
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单级CIC2倍内插滤波器,用verilogHDL实现
(系统自动生成,下载前可以参看下载内容)
下载文件列表
cic1s2/a
cic1s2/cic1s2.bld
cic1s2/cic1s2.cmd_log
cic1s2/cic1s2.ise
cic1s2/cic1s2.ise_ISE_Backup
cic1s2/cic1s2.lso
cic1s2/cic1s2.ngc
cic1s2/cic1s2.ngd
cic1s2/cic1s2.ngr
cic1s2/cic1s2.ntrc_log
cic1s2/cic1s2.pcf
cic1s2/cic1s2.prj
cic1s2/cic1s2.restore
cic1s2/cic1s2.stx
cic1s2/cic1s2.syr
cic1s2/cic1s2.udo
cic1s2/cic1s2.xst
cic1s2/cic1s2t.v
cic1s2/cic1s2t_v.fdo
cic1s2/cic1s2t_v.mdo
cic1s2/cic1s2t_v.udo
cic1s2/cic1s2_map.map
cic1s2/cic1s2_map.mrp
cic1s2/cic1s2_map.ncd
cic1s2/cic1s2_map.ngm
cic1s2/cic1s2_summary.html
cic1s2/cic1s2_summary.xml
cic1s2/cic1s2_usage.xml
cic1s2/cic3s2.v
cic1s2/cic_pic_wb
cic1s2/cic_sch
cic1s2/cic_sch_c
cic1s2/cic_sch_wb
cic1s2/cic_sch_wb.pdf
cic1s2/netgen/map/cic1s2_map.nlf
cic1s2/netgen/map/cic1s2_map.sdf
cic1s2/netgen/map/cic1s2_map.v
cic1s2/pic_cic
cic1s2/transcript
cic1s2/vsim.wlf
cic1s2/work/cic1s2/verilog.asm
cic1s2/work/cic1s2/_primary.dat
cic1s2/work/cic1s2/_primary.vhd
cic1s2/work/cic1s2t_v/verilog.asm
cic1s2/work/cic1s2t_v/_primary.dat
cic1s2/work/cic1s2t_v/_primary.vhd
cic1s2/work/glbl/verilog.asm
cic1s2/work/glbl/_primary.dat
cic1s2/work/glbl/_primary.vhd
cic1s2/work/_info
cic1s2/xst/work/hdllib.ref
cic1s2/xst/work/vlg69/cic1s2.bin
cic1s2/_ngo/netlist.lst
cic1s2/_xmsgs/map.xmsgs
cic1s2/_xmsgs/netgen.xmsgs
cic1s2/_xmsgs/ngdbuild.xmsgs
cic1s2/_xmsgs/xst.xmsgs
cic1s2/xst/dump.xst/cic1s2.prj/ngx/notopt
cic1s2/xst/dump.xst/cic1s2.prj/ngx/opt
cic1s2/xst/dump.xst/cic1s2.prj/ngx
cic1s2/xst/dump.xst/cic1s2.prj
cic1s2/xst/work/vlg69
cic1s2/netgen/map
cic1s2/work/cic1s2
cic1s2/work/cic1s2t_v
cic1s2/work/glbl
cic1s2/xst/dump.xst
cic1s2/xst/projnav.tmp
cic1s2/xst/work
cic1s2/netgen
cic1s2/work
cic1s2/xst
cic1s2/_ngo
cic1s2/_xmsgs
cic1s2
www.dssz.com.txt
cic1s2/cic1s2.bld
cic1s2/cic1s2.cmd_log
cic1s2/cic1s2.ise
cic1s2/cic1s2.ise_ISE_Backup
cic1s2/cic1s2.lso
cic1s2/cic1s2.ngc
cic1s2/cic1s2.ngd
cic1s2/cic1s2.ngr
cic1s2/cic1s2.ntrc_log
cic1s2/cic1s2.pcf
cic1s2/cic1s2.prj
cic1s2/cic1s2.restore
cic1s2/cic1s2.stx
cic1s2/cic1s2.syr
cic1s2/cic1s2.udo
cic1s2/cic1s2.xst
cic1s2/cic1s2t.v
cic1s2/cic1s2t_v.fdo
cic1s2/cic1s2t_v.mdo
cic1s2/cic1s2t_v.udo
cic1s2/cic1s2_map.map
cic1s2/cic1s2_map.mrp
cic1s2/cic1s2_map.ncd
cic1s2/cic1s2_map.ngm
cic1s2/cic1s2_summary.html
cic1s2/cic1s2_summary.xml
cic1s2/cic1s2_usage.xml
cic1s2/cic3s2.v
cic1s2/cic_pic_wb
cic1s2/cic_sch
cic1s2/cic_sch_c
cic1s2/cic_sch_wb
cic1s2/cic_sch_wb.pdf
cic1s2/netgen/map/cic1s2_map.nlf
cic1s2/netgen/map/cic1s2_map.sdf
cic1s2/netgen/map/cic1s2_map.v
cic1s2/pic_cic
cic1s2/transcript
cic1s2/vsim.wlf
cic1s2/work/cic1s2/verilog.asm
cic1s2/work/cic1s2/_primary.dat
cic1s2/work/cic1s2/_primary.vhd
cic1s2/work/cic1s2t_v/verilog.asm
cic1s2/work/cic1s2t_v/_primary.dat
cic1s2/work/cic1s2t_v/_primary.vhd
cic1s2/work/glbl/verilog.asm
cic1s2/work/glbl/_primary.dat
cic1s2/work/glbl/_primary.vhd
cic1s2/work/_info
cic1s2/xst/work/hdllib.ref
cic1s2/xst/work/vlg69/cic1s2.bin
cic1s2/_ngo/netlist.lst
cic1s2/_xmsgs/map.xmsgs
cic1s2/_xmsgs/netgen.xmsgs
cic1s2/_xmsgs/ngdbuild.xmsgs
cic1s2/_xmsgs/xst.xmsgs
cic1s2/xst/dump.xst/cic1s2.prj/ngx/notopt
cic1s2/xst/dump.xst/cic1s2.prj/ngx/opt
cic1s2/xst/dump.xst/cic1s2.prj/ngx
cic1s2/xst/dump.xst/cic1s2.prj
cic1s2/xst/work/vlg69
cic1s2/netgen/map
cic1s2/work/cic1s2
cic1s2/work/cic1s2t_v
cic1s2/work/glbl
cic1s2/xst/dump.xst
cic1s2/xst/projnav.tmp
cic1s2/xst/work
cic1s2/netgen
cic1s2/work
cic1s2/xst
cic1s2/_ngo
cic1s2/_xmsgs
cic1s2
www.dssz.com.txt
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