文件名称:05805
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无线通信fpga设计matlab、verilog代码
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下载文件列表
05805/matlab代码/matlab/c10/c.mat
05805/matlab代码/matlab/c10/costas.m
05805/matlab代码/matlab/c10/frame_syn.m
05805/matlab代码/matlab/c10/PLLC.m
05805/matlab代码/matlab/c10/RRCrece.m
05805/matlab代码/matlab/c10/RRCsend.m
05805/matlab代码/matlab/c10/symbol_syn.m
05805/matlab代码/matlab/c11/adpeq.m
05805/matlab代码/matlab/c11/ante.m
05805/matlab代码/matlab/c11/FFTlms.m
05805/matlab代码/matlab/c11/lms.m
05805/matlab代码/matlab/c11/RLS.m
05805/matlab代码/matlab/c11/signlms.m
05805/matlab代码/matlab/c11/WHT.m
05805/matlab代码/matlab/c11/WHTlms.m
05805/matlab代码/matlab/c12/correce.m
05805/matlab代码/matlab/c12/matchfil.m
05805/matlab代码/matlab/c12/rake.m
05805/matlab代码/matlab/c13/cell_search_cpich.m
05805/matlab代码/matlab/c13/ovsf.m
05805/matlab代码/matlab/c13/scramble.m
05805/matlab代码/matlab/c13/wcdmasource.m
05805/matlab代码/matlab/c6/impinvar_bilinear.m
05805/matlab代码/matlab/c6/rcosflt_filter.m
05805/matlab代码/matlab/c6/rcosine_filter.m
05805/matlab代码/matlab/c7/cicde.m
05805/matlab代码/matlab/c7/CICdec.m
05805/matlab代码/matlab/c7/cicin.m
05805/matlab代码/matlab/c7/CICinterp.m
05805/matlab代码/matlab/c7/halfdec.m
05805/matlab代码/matlab/c7/halfinterp.m
05805/matlab代码/matlab/c7/hbfil.m
05805/matlab代码/matlab/c7/multirece.m
05805/matlab代码/matlab/c7/multisend.m
05805/matlab代码/matlab/c8/ASKmod.m
05805/matlab代码/matlab/c8/F2T.m
05805/matlab代码/matlab/c8/LPF.m
05805/matlab代码/matlab/c8/MSKmod.m
05805/matlab代码/matlab/c8/OFDMmod.m
05805/matlab代码/matlab/c8/QAMmod.m
05805/matlab代码/matlab/c8/QPSKmod.m
05805/matlab代码/matlab/c8/T2F.m
05805/matlab代码/matlab/c9/convcode.m
05805/matlab代码/matlab/c9/CRCcheck.m
05805/matlab代码/matlab/c9/encoderm.m
05805/matlab代码/matlab/c9/encode_bit.m
05805/matlab代码/matlab/c9/hamming7_4.m
05805/matlab代码/matlab/c9/intrlvcode.m
05805/matlab代码/matlab/c9/RScode.m
05805/matlab代码/matlab/c9/rsc_encode.m
05805/matlab代码/matlab/c9/TCMcode.m
05805/Verilog代码/6、7.doc
05805/Verilog代码/c10/10-2/mult.xco
05805/Verilog代码/c10/10-2/mydds.xco
05805/Verilog代码/c10/10-2/square_syn.v
05805/Verilog代码/c10/10-4/coastas_dds.v
05805/Verilog代码/c10/10-4/costas_lf.v
05805/Verilog代码/c10/10-4/costas_loop.v
05805/Verilog代码/c10/10-4/costas_lpf.v
05805/Verilog代码/c10/10-4/costas_mult.v
05805/Verilog代码/c10/10-4/err_mult.v
05805/Verilog代码/c10/10-4/fir_lpf.xco
05805/Verilog代码/c10/10-4/mult.xco
05805/Verilog代码/c10/10-4/my_dds.xco
05805/Verilog代码/c10/10-6/dearly_sub.v
05805/Verilog代码/c10/10-6/dedds.v
05805/Verilog代码/c10/10-6/delay_early_gate.v
05805/Verilog代码/c10/10-6/de_mult.xco
05805/Verilog代码/c10/10-6/eddds.xco
05805/Verilog代码/c10/10-6/iir.v
05805/Verilog代码/c10/10-6/iir1.v
05805/Verilog代码/c10/10-8/baker.v
05805/Verilog代码/c11/11-10/div16.xco
05805/Verilog代码/c11/11-10/fir_rls.v
05805/Verilog代码/c11/11-10/rlsmult.xco
05805/Verilog代码/c11/11-10/shiftreg25.xco
05805/Verilog代码/c11/11-10/shiftreg28.xco
05805/Verilog代码/c11/11-10/shiftreg3.xco
05805/Verilog代码/c11/11-12/dfe_filter.v
05805/Verilog代码/c11/11-12/dfe_mult.xco
05805/Verilog代码/c11/11-14/aa_adder.xco
05805/Verilog代码/c11/11-14/aa_bram.xco
05805/Verilog代码/c11/11-14/aa_cmult.xco
05805/Verilog代码/c11/11-14/ad_a.v
05805/Verilog代码/c11/11-14/shift16.xco
05805/Verilog代码/c11/11-2/fir_lms.v
05805/Verilog代码/c11/11-3/fir_pipline_lms.v
05805/Verilog代码/c11/11-3/lmsmult.xco
05805/Verilog代码/c11/11-5/mult.xco
05805/Verilog代码/c11/11-5/shiftreg4.xco
05805/Verilog代码/c11/11-5/sign_fir_lms.v
05805/Verilog代码/c11/11-8/blockconnect.v
05805/Verilog代码/c11/11-8/cmult.v
05805/Verilog代码/c11/11-8/coe_updata.v
05805/Verilog代码/c11/11-8/complex_mult.xco
05805/Verilog代码/c11/11-8/fft_block.v
05805/Verilog代码/c11/11-8/fft_block_lms.v
05805/Verilog代码/c11/11-8/fft_w16_p32.xco
05805/Verilog代码/c11/11-8/gonge.v
05805/Verilog代码/c11/11-8/ifft_block.v
05805/Verilog代码/c11/11-8/insert.v
05805/Verilog代码/c11/11-8/save_sub.v
05805/Verilog代码/c11/11-8/shiftreg.xco
05805/Verilog代码/c11/11-8/shiftreg3.xco
05805/Verilog代码/c11/11-8/shift_reg2.xco
05805/Verilog代码/c11/11-8/srl16_w16_d16.xco
05805/Verilog代码/c11/11-8/test_block_connect.v
05805/Verilog代码/c12_0/12-6/rake_cmult.xco
05805/Verilog代码/c12_0/12-6/rake_mrc.v
05805/Verilog代码/c12_0/12-6/rake_shift4.xco
05805/Verilog代码/c13/13-2/ovsf.v
05805/Verilog代码/c13/13-3/Dscamb.v
05805/Verilog代码/c13/13-6/adder_18vs18.xco
05805/Verilog代码/c13/13-6/CPICH.v
05805/Verilog代码/c13/13-6/ram_1024.xco
05805/Verilog代码/c13/13-6/ram_descramb.xco
05805/Verilog代码/c3/3-22/adder8.v
05805/Verilog代码/c3/3-23/adder8_2.v
05805/Verilog代码/c3/3-24/adder8_4.v
05805/Verilog代码/c5/5-1/adder16_2.v
05805/Verilog代码/c5/5-10/div16.xco
05805/Verilog代码/c5/5-10/div16_1.v
05805/Verilog代码/c5/5-11/divf16.xco
05805/Verilog代码/c5/5-11/divf16_1.v
05805/Verilog代码/c5/5-15/dds.v
05805/Verilog代码/c5/5-15/rom_cos.coe
05805/Verilog代码/c5/5-15/rom_cose.xco
05805/Verilog代码/c5/5-15/rom_sin.coe
05805/Verilog代码/c5/5-15/rom_sine.xco
05805/Verilog代码/c5/5-16/dds1.v
05805/Verilog代码/c5/5-16/mydds.xco
05805/Verilog代码/c5/5-17/cordic.v
05805/Verilog代码/c5/5-18/sqrt.xco
05805/Verilog代码/c5/5-18/sqrt1.v
05805/Verilog代码/c5/5-2/add_4.v
05805/Verilog代码/c5/5-3/adder.xco
05805/Verilog代码/c5/5-3/adder1.v
05805/Verilog代码/c5/5-4/ade.v
05805/Verilog代码/c5/5-5/mul_addtree.v
05805/Verilog代码/c5/5-6/cmultip.v
05805/Verilog代码/c5/5-6/rmulti.xco
05805/Verilog代码/c5/
05805/matlab代码/matlab/c10/costas.m
05805/matlab代码/matlab/c10/frame_syn.m
05805/matlab代码/matlab/c10/PLLC.m
05805/matlab代码/matlab/c10/RRCrece.m
05805/matlab代码/matlab/c10/RRCsend.m
05805/matlab代码/matlab/c10/symbol_syn.m
05805/matlab代码/matlab/c11/adpeq.m
05805/matlab代码/matlab/c11/ante.m
05805/matlab代码/matlab/c11/FFTlms.m
05805/matlab代码/matlab/c11/lms.m
05805/matlab代码/matlab/c11/RLS.m
05805/matlab代码/matlab/c11/signlms.m
05805/matlab代码/matlab/c11/WHT.m
05805/matlab代码/matlab/c11/WHTlms.m
05805/matlab代码/matlab/c12/correce.m
05805/matlab代码/matlab/c12/matchfil.m
05805/matlab代码/matlab/c12/rake.m
05805/matlab代码/matlab/c13/cell_search_cpich.m
05805/matlab代码/matlab/c13/ovsf.m
05805/matlab代码/matlab/c13/scramble.m
05805/matlab代码/matlab/c13/wcdmasource.m
05805/matlab代码/matlab/c6/impinvar_bilinear.m
05805/matlab代码/matlab/c6/rcosflt_filter.m
05805/matlab代码/matlab/c6/rcosine_filter.m
05805/matlab代码/matlab/c7/cicde.m
05805/matlab代码/matlab/c7/CICdec.m
05805/matlab代码/matlab/c7/cicin.m
05805/matlab代码/matlab/c7/CICinterp.m
05805/matlab代码/matlab/c7/halfdec.m
05805/matlab代码/matlab/c7/halfinterp.m
05805/matlab代码/matlab/c7/hbfil.m
05805/matlab代码/matlab/c7/multirece.m
05805/matlab代码/matlab/c7/multisend.m
05805/matlab代码/matlab/c8/ASKmod.m
05805/matlab代码/matlab/c8/F2T.m
05805/matlab代码/matlab/c8/LPF.m
05805/matlab代码/matlab/c8/MSKmod.m
05805/matlab代码/matlab/c8/OFDMmod.m
05805/matlab代码/matlab/c8/QAMmod.m
05805/matlab代码/matlab/c8/QPSKmod.m
05805/matlab代码/matlab/c8/T2F.m
05805/matlab代码/matlab/c9/convcode.m
05805/matlab代码/matlab/c9/CRCcheck.m
05805/matlab代码/matlab/c9/encoderm.m
05805/matlab代码/matlab/c9/encode_bit.m
05805/matlab代码/matlab/c9/hamming7_4.m
05805/matlab代码/matlab/c9/intrlvcode.m
05805/matlab代码/matlab/c9/RScode.m
05805/matlab代码/matlab/c9/rsc_encode.m
05805/matlab代码/matlab/c9/TCMcode.m
05805/Verilog代码/6、7.doc
05805/Verilog代码/c10/10-2/mult.xco
05805/Verilog代码/c10/10-2/mydds.xco
05805/Verilog代码/c10/10-2/square_syn.v
05805/Verilog代码/c10/10-4/coastas_dds.v
05805/Verilog代码/c10/10-4/costas_lf.v
05805/Verilog代码/c10/10-4/costas_loop.v
05805/Verilog代码/c10/10-4/costas_lpf.v
05805/Verilog代码/c10/10-4/costas_mult.v
05805/Verilog代码/c10/10-4/err_mult.v
05805/Verilog代码/c10/10-4/fir_lpf.xco
05805/Verilog代码/c10/10-4/mult.xco
05805/Verilog代码/c10/10-4/my_dds.xco
05805/Verilog代码/c10/10-6/dearly_sub.v
05805/Verilog代码/c10/10-6/dedds.v
05805/Verilog代码/c10/10-6/delay_early_gate.v
05805/Verilog代码/c10/10-6/de_mult.xco
05805/Verilog代码/c10/10-6/eddds.xco
05805/Verilog代码/c10/10-6/iir.v
05805/Verilog代码/c10/10-6/iir1.v
05805/Verilog代码/c10/10-8/baker.v
05805/Verilog代码/c11/11-10/div16.xco
05805/Verilog代码/c11/11-10/fir_rls.v
05805/Verilog代码/c11/11-10/rlsmult.xco
05805/Verilog代码/c11/11-10/shiftreg25.xco
05805/Verilog代码/c11/11-10/shiftreg28.xco
05805/Verilog代码/c11/11-10/shiftreg3.xco
05805/Verilog代码/c11/11-12/dfe_filter.v
05805/Verilog代码/c11/11-12/dfe_mult.xco
05805/Verilog代码/c11/11-14/aa_adder.xco
05805/Verilog代码/c11/11-14/aa_bram.xco
05805/Verilog代码/c11/11-14/aa_cmult.xco
05805/Verilog代码/c11/11-14/ad_a.v
05805/Verilog代码/c11/11-14/shift16.xco
05805/Verilog代码/c11/11-2/fir_lms.v
05805/Verilog代码/c11/11-3/fir_pipline_lms.v
05805/Verilog代码/c11/11-3/lmsmult.xco
05805/Verilog代码/c11/11-5/mult.xco
05805/Verilog代码/c11/11-5/shiftreg4.xco
05805/Verilog代码/c11/11-5/sign_fir_lms.v
05805/Verilog代码/c11/11-8/blockconnect.v
05805/Verilog代码/c11/11-8/cmult.v
05805/Verilog代码/c11/11-8/coe_updata.v
05805/Verilog代码/c11/11-8/complex_mult.xco
05805/Verilog代码/c11/11-8/fft_block.v
05805/Verilog代码/c11/11-8/fft_block_lms.v
05805/Verilog代码/c11/11-8/fft_w16_p32.xco
05805/Verilog代码/c11/11-8/gonge.v
05805/Verilog代码/c11/11-8/ifft_block.v
05805/Verilog代码/c11/11-8/insert.v
05805/Verilog代码/c11/11-8/save_sub.v
05805/Verilog代码/c11/11-8/shiftreg.xco
05805/Verilog代码/c11/11-8/shiftreg3.xco
05805/Verilog代码/c11/11-8/shift_reg2.xco
05805/Verilog代码/c11/11-8/srl16_w16_d16.xco
05805/Verilog代码/c11/11-8/test_block_connect.v
05805/Verilog代码/c12_0/12-6/rake_cmult.xco
05805/Verilog代码/c12_0/12-6/rake_mrc.v
05805/Verilog代码/c12_0/12-6/rake_shift4.xco
05805/Verilog代码/c13/13-2/ovsf.v
05805/Verilog代码/c13/13-3/Dscamb.v
05805/Verilog代码/c13/13-6/adder_18vs18.xco
05805/Verilog代码/c13/13-6/CPICH.v
05805/Verilog代码/c13/13-6/ram_1024.xco
05805/Verilog代码/c13/13-6/ram_descramb.xco
05805/Verilog代码/c3/3-22/adder8.v
05805/Verilog代码/c3/3-23/adder8_2.v
05805/Verilog代码/c3/3-24/adder8_4.v
05805/Verilog代码/c5/5-1/adder16_2.v
05805/Verilog代码/c5/5-10/div16.xco
05805/Verilog代码/c5/5-10/div16_1.v
05805/Verilog代码/c5/5-11/divf16.xco
05805/Verilog代码/c5/5-11/divf16_1.v
05805/Verilog代码/c5/5-15/dds.v
05805/Verilog代码/c5/5-15/rom_cos.coe
05805/Verilog代码/c5/5-15/rom_cose.xco
05805/Verilog代码/c5/5-15/rom_sin.coe
05805/Verilog代码/c5/5-15/rom_sine.xco
05805/Verilog代码/c5/5-16/dds1.v
05805/Verilog代码/c5/5-16/mydds.xco
05805/Verilog代码/c5/5-17/cordic.v
05805/Verilog代码/c5/5-18/sqrt.xco
05805/Verilog代码/c5/5-18/sqrt1.v
05805/Verilog代码/c5/5-2/add_4.v
05805/Verilog代码/c5/5-3/adder.xco
05805/Verilog代码/c5/5-3/adder1.v
05805/Verilog代码/c5/5-4/ade.v
05805/Verilog代码/c5/5-5/mul_addtree.v
05805/Verilog代码/c5/5-6/cmultip.v
05805/Verilog代码/c5/5-6/rmulti.xco
05805/Verilog代码/c5/
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