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文件名称:串口图片通过VGA显示

  • 所属分类：
    VHDL编程
  • 标签属性：
    [VHDL] [源码]
  • 上传时间：
    2020-04-24
  • 文件大小：
    6.76mb
  • 已下载：
    0次
  • 提 供 者：
    583962148@qq.com
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

将图片数据通过uart串口发送到fpda的sdram，然后通过VGA进行显示
(系统自动生成,下载前可以参看下载内容)

下载文件列表

压缩包 : lab1_Uart_Pic_Sdram_VGA.zip 列表
Uart_Pic_Sdram_VGA/
Uart_Pic_Sdram_VGA/Dev/
Uart_Pic_Sdram_VGA/Dev/.qsys_edit/
Uart_Pic_Sdram_VGA/Dev/.qsys_edit/filters.xml
Uart_Pic_Sdram_VGA/Dev/.qsys_edit/preferences.xml
Uart_Pic_Sdram_VGA/Dev/Clk_Pll.qip
Uart_Pic_Sdram_VGA/Dev/db/
Uart_Pic_Sdram_VGA/Dev/db/altsyncram_a011.tdf
Uart_Pic_Sdram_VGA/Dev/db/alt_synch_pipe_b7d.tdf
Uart_Pic_Sdram_VGA/Dev/db/alt_synch_pipe_c7d.tdf
Uart_Pic_Sdram_VGA/Dev/db/alt_synch_pipe_d7d.tdf
Uart_Pic_Sdram_VGA/Dev/db/alt_synch_pipe_e7d.tdf
Uart_Pic_Sdram_VGA/Dev/db/a_gray2bin_6ib.tdf
Uart_Pic_Sdram_VGA/Dev/db/a_graycounter_3p6.tdf
Uart_Pic_Sdram_VGA/Dev/db/a_graycounter_v6c.tdf
Uart_Pic_Sdram_VGA/Dev/db/Clk_Pll_altpll.v
Uart_Pic_Sdram_VGA/Dev/db/cmpr_n76.tdf
Uart_Pic_Sdram_VGA/Dev/db/dcfifo_rof1.tdf
Uart_Pic_Sdram_VGA/Dev/db/dcfifo_tmi1.tdf
Uart_Pic_Sdram_VGA/Dev/db/dffpipe_909.tdf
Uart_Pic_Sdram_VGA/Dev/db/dffpipe_a09.tdf
Uart_Pic_Sdram_VGA/Dev/db/dffpipe_b09.tdf
Uart_Pic_Sdram_VGA/Dev/db/dffpipe_c09.tdf
Uart_Pic_Sdram_VGA/Dev/db/dffpipe_d09.tdf
Uart_Pic_Sdram_VGA/Dev/db/logic_util_heursitic.dat
Uart_Pic_Sdram_VGA/Dev/db/prev_cmp_Uart_Pic_Sdram_VGA.qmsg
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(0).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(0).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(1).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(1).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(10).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(10).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(11).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(11).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(12).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(12).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(13).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(13).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(14).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(14).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(15).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(15).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(16).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(16).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(17).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(17).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(18).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(18).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(19).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(19).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(2).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(2).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(20).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(20).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(21).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(21).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(22).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(22).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(23).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(23).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(24).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(24).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(25).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(25).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(3).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(3).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(4).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(4).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(5).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(5).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(6).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(6).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(7).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(7).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(8).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(8).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(9).cnf.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.(9).cnf.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.asm.qmsg
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.asm.rdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.asm_labs.ddb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.cbx.xml
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.cmp.bpm
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.cmp.cdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.cmp.hdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.cmp.idb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.cmp.kpt
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.cmp.logdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.cmp.rdb
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.cmp_merge.kpt
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.cycloneive_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.cycloneive_io_sim_cache.45um_ss_1200mv_0c_slow.hsd
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.cycloneive_io_sim_cache.45um_ss_1200mv_85c_slow.hsd
Uart_Pic_Sdram_VGA/Dev/db/Uart_Pic_Sdram_VGA.db_info
Uart_Pic_Sdram_VGA/Dev/db/

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