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文件名称:FLASH_model

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    2020-10-15
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    1.4mb
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模拟flash读写等时序,学习如何操作该芯片,芯片是n25q系列,欢迎大家下载学习
(系统自动生成,下载前可以参看下载内容)

下载文件列表

压缩包 : N25Q256A13E_VG14.zip 列表
N25Q256A13E_VG14/
N25Q256A13E_VG14/cds.lib
N25Q256A13E_VG14/code/
N25Q256A13E_VG14/code/N25Qxxx.v
N25Q256A13E_VG14/depend.tcfg
N25Q256A13E_VG14/hdl.var
N25Q256A13E_VG14/include/
N25Q256A13E_VG14/include/Decoders.h
N25Q256A13E_VG14/include/DevParam.h
N25Q256A13E_VG14/include/PLRSDetectors.h
N25Q256A13E_VG14/include/StackDecoder.h
N25Q256A13E_VG14/include/TimingData.h
N25Q256A13E_VG14/include/UserData.h
N25Q256A13E_VG14/modelsim.ini
N25Q256A13E_VG14/path.txt
N25Q256A13E_VG14/readme.txt
N25Q256A13E_VG14/run_cov_vsim
N25Q256A13E_VG14/run_modelsim
N25Q256A13E_VG14/run_ncsim
N25Q256A13E_VG14/run_vcs
N25Q256A13E_VG14/sim/
N25Q256A13E_VG14/sim/.restartSimSession.tcl.old
N25Q256A13E_VG14/sim/.simvision/
N25Q256A13E_VG14/sim/.simvision/dbrowser-bookmarks
N25Q256A13E_VG14/sim/.simvision/schematic-bookmarks
N25Q256A13E_VG14/sim/.simvision/source-bookmarks
N25Q256A13E_VG14/sim/do.do
N25Q256A13E_VG14/sim/mem_Q256.vmf
N25Q256A13E_VG14/sim/modelsim.ini
N25Q256A13E_VG14/sim/session.inter.vpd.tcl
N25Q256A13E_VG14/sim/sfdp.vmf
N25Q256A13E_VG14/sim/vlog.opt
N25Q256A13E_VG14/sim/wave.do
N25Q256A13E_VG14/sim/waves.shm/
N25Q256A13E_VG14/sim/waves.shm/waves.dsn
N25Q256A13E_VG14/sim/waves.shm/waves.trn
N25Q256A13E_VG14/spi_falsh.cr.mti
N25Q256A13E_VG14/spi_falsh.mpf
N25Q256A13E_VG14/stim/
N25Q256A13E_VG14/stim/dummy_prova.v
N25Q256A13E_VG14/stim/erase.v
N25Q256A13E_VG14/stim/lock1.v
N25Q256A13E_VG14/stim/lock2.v
N25Q256A13E_VG14/stim/lock_test_SR.v
N25Q256A13E_VG14/stim/otp.v
N25Q256A13E_VG14/stim/program.v
N25Q256A13E_VG14/stim/program_top.v
N25Q256A13E_VG14/stim/read.v
N25Q256A13E_VG14/stim/Readme.txt
N25Q256A13E_VG14/stim/read_altera_debug.v
N25Q256A13E_VG14/stim/read_dtr.v
N25Q256A13E_VG14/stim/test_address_mode.v
N25Q256A13E_VG14/stim/test_protocol.v
N25Q256A13E_VG14/stim/test_protocol_Ashif.v
N25Q256A13E_VG14/stim/XIP_Numonyx.v
N25Q256A13E_VG14/top/
N25Q256A13E_VG14/top/ClockGenerator.v
N25Q256A13E_VG14/top/N25Q256A13E_VG14.ipinfo
N25Q256A13E_VG14/top/StimGen_interface.h
N25Q256A13E_VG14/top/StimTasks.v
N25Q256A13E_VG14/top/Testbench.v
N25Q256A13E_VG14/transcript
N25Q256A13E_VG14/vlog.opt
N25Q256A13E_VG14/vsim.wlf
N25Q256A13E_VG14/work/
N25Q256A13E_VG14/work/@c@u@idecoder/
N25Q256A13E_VG14/work/@c@u@idecoder/verilog.prw
N25Q256A13E_VG14/work/@c@u@idecoder/verilog.psm
N25Q256A13E_VG14/work/@c@u@idecoder/_primary.dat
N25Q256A13E_VG14/work/@c@u@idecoder/_primary.dbs
N25Q256A13E_VG14/work/@c@u@idecoder/_primary.vhd
N25Q256A13E_VG14/work/@clock@generator/
N25Q256A13E_VG14/work/@clock@generator/verilog.prw
N25Q256A13E_VG14/work/@clock@generator/verilog.psm
N25Q256A13E_VG14/work/@clock@generator/_primary.dat
N25Q256A13E_VG14/work/@clock@generator/_primary.dbs
N25Q256A13E_VG14/work/@clock@generator/_primary.vhd
N25Q256A13E_VG14/work/@debug@module/
N25Q256A13E_VG14/work/@debug@module/verilog.prw
N25Q256A13E_VG14/work/@debug@module/verilog.psm
N25Q256A13E_VG14/work/@debug@module/_primary.dat
N25Q256A13E_VG14/work/@debug@module/_primary.dbs
N25Q256A13E_VG14/work/@debug@module/_primary.vhd
N25Q256A13E_VG14/work/@dual@quad@ops/
N25Q256A13E_VG14/work/@dual@quad@ops/verilog.prw
N25Q256A13E_VG14/work/@dual@quad@ops/verilog.psm
N25Q256A13E_VG14/work/@dual@quad@ops/_primary.dat
N25Q256A13E_VG14/work/@dual@quad@ops/_primary.dbs
N25Q256A13E_VG14/work/@dual@quad@ops/_primary.vhd
N25Q256A13E_VG14/work/@extended@address@register/
N25Q256A13E_VG14/work/@extended@address@register/verilog.prw
N25Q256A13E_VG14/work/@extended@address@register/verilog.psm
N25Q256A13E_VG14/work/@extended@address@register/_primary.dat
N25Q256A13E_VG14/work/@extended@address@register/_primary.dbs
N25Q256A13E_VG14/work/@extended@address@register/_primary.vhd
N25Q256A13E_VG14/work/@flag@status@register/
N25Q256A13E_VG14/work/@flag@status@register/verilog.prw
N25Q256A13E_VG14/work/@flag@status@register/verilog.psm
N25Q256A13E_VG14/work/@flag@status@register/_primary.dat
N25Q256A13E_VG14/work/@flag@status@register/_primary.dbs
N25Q256A13E_VG14/work/@flag@status@register/_primary.vhd
N25Q256A13E_VG14/work/@flash@discovery@parameter/
N25Q256A13E_VG14/work/@flash@discovery@parameter/verilog.prw
N25Q256A13E_VG14/work/@flash@discovery@parameter/verilog.psm
N25Q256A13E_VG14/work/@flash@discovery@parameter/_primary.dat
N25Q256A13E_VG14/work/@flash@discovery@parameter/_primary.dbs
N25Q256A13E_VG14/work/@flash@discovery@parameter/_primary.vhd
N25Q256A13E_VG14/work/@lock@manager/
N25Q256A13E_VG14/work/@lock@manager/verilog.prw
N25Q256A13E_VG14/work/@lock@manager/verilog.psm
N25Q256A13E_VG14/work/@lock@manager/_primary.dat
N25Q256A13E_VG14/work/@lock@manager/_primary.dbs
N25Q256A13E_VG14/work/@lock@manager/_primary.vhd
N25Q256A13E_VG14/work/@memory/
N25Q256A13E_VG14/work/@memory/verilog.prw
N25Q256A13E_VG14/work/@memory/verilog.psm
N25Q256A13E_VG14/work/@memory/_primary.dat
N25Q256A13E_VG14/work/@memory/_primary.dbs
N25Q256A13E_VG14/work/@memory/_primary.vhd
N25Q256A13E_VG14/work/@n25@qxxx/
N25Q256A13E_VG14/work/@n25@qxxx/verilog.prw
N25Q256A13E_VG14/work/@n25@qxxx/verilog.psm
N25Q256A13E_VG14/work/@n25@qxxx/_primary.dat
N25Q256A13E_VG14/work/@n25@qxxx/_primary.dbs
N25Q256A13E_VG14/work/@n25@qxxx/_primary.

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