文件名称:发一个基于ModelSim仿真的Verilog源代码包
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- 上传时间:2008-10-13
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文件大小:73.15kb
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发一个基于ModelSim仿真的Verilog源代码包-made a ModelSim simulation based on the Verilog source code
(系统自动生成,下载前可以参看下载内容)
下载文件列表
HDL_exmple
HDL_exmple/EX3_ADD
HDL_exmple/EX3_ADD/testadder.vhd
HDL_exmple/EX3_ADD/ADDER.VHD
HDL_exmple/EX2_CNT
HDL_exmple/EX2_CNT/COUNTER.V
HDL_exmple/EX2_CNT/TCOUNTER.V
HDL_exmple/EX1_MUX
HDL_exmple/EX1_MUX/testformuxstr.v
HDL_exmple/EX1_MUX/muxstr.v
HDL_exmple/EX4_VHDL
HDL_exmple/EX4_VHDL/TRAFFIC.VHD
HDL_exmple/EX4_VHDL/QUEUE.VHD
HDL_exmple/EX4_VHDL/tb_traffic.vhd
covlen2
covlen2/ConvEncdTestBnch.v
covlen2/ConEncdJprj.mpf
covlen2/ConvEncdJA.bak
covlen2/ConvEncdJA.v
covlen2/vsim.wlf
covlen2/ConEncdJprj.cr.mti
covlen2/work
covlen2/work/_info
covlen2/work/@conv@encd@test@bnch
covlen2/work/@conv@encd@test@bnch/_primary.vhd
covlen2/work/@conv@encd@test@bnch/verilog.asm
covlen2/work/@conv@encd@test@bnch/_primary.dat
covlen2/work/top_encode
covlen2/work/top_encode/_primary.vhd
covlen2/work/top_encode/verilog.asm
covlen2/work/top_encode/_primary.dat
covlen2/work/conv_encode
covlen2/work/conv_encode/_primary.vhd
covlen2/work/conv_encode/verilog.asm
covlen2/work/conv_encode/_primary.dat
covlen2/work/ser2par
covlen2/work/ser2par/_primary.vhd
covlen2/work/ser2par/verilog.asm
covlen2/work/ser2par/_primary.dat
covlen3
covlen3/dff.v
covlen3/convl3_en.v
covlen3/convlen3_test.v
covlen3/ASIC_Book_Encoder.mpf
covlen3/vsim.wlf
covlen3/ASIC_Book_Encoder.cr.mti
covlen3/work
covlen3/work/_info
covlen3/work/dff
covlen3/work/dff/_primary.vhd
covlen3/work/dff/verilog.asm
covlen3/work/dff/_primary.dat
covlen3/work/convl3_en
covlen3/work/convl3_en/_primary.vhd
covlen3/work/convl3_en/verilog.asm
covlen3/work/convl3_en/_primary.dat
covlen3/work/convlen3_test
covlen3/work/convlen3_test/_primary.vhd
covlen3/work/convlen3_test/verilog.asm
covlen3/work/convlen3_test/_primary.dat
covlen
covlen/convlen_test.v
covlen/dff.v
covlen/convl_en.v
keyscan
keyscan/keyscanprj.mpf
keyscan/vsim.wlf
keyscan/keyscan.v
keyscan/keyscan_test.v
keyscan/modelsim.tcl
keyscan/keyscan
keyscan/keyscanprj.cr.mti
keyscan/work
keyscan/work/_info
keyscan/work/keyscan_test
keyscan/work/keyscan_test/_primary.vhd
keyscan/work/keyscan_test/verilog.asm
keyscan/work/keyscan_test/_primary.dat
keyscan/work/keyscan_test/fast.asm
keyscan/work/keyscan_test/fast.dt2
keyscan/work/keyscan
keyscan/work/keyscan/_primary.vhd
keyscan/work/keyscan/verilog.asm
keyscan/work/keyscan/_primary.dat
keyscan/work/keyscan/fast.dt2
www.dssz.com.txt
HDL_exmple/EX3_ADD
HDL_exmple/EX3_ADD/testadder.vhd
HDL_exmple/EX3_ADD/ADDER.VHD
HDL_exmple/EX2_CNT
HDL_exmple/EX2_CNT/COUNTER.V
HDL_exmple/EX2_CNT/TCOUNTER.V
HDL_exmple/EX1_MUX
HDL_exmple/EX1_MUX/testformuxstr.v
HDL_exmple/EX1_MUX/muxstr.v
HDL_exmple/EX4_VHDL
HDL_exmple/EX4_VHDL/TRAFFIC.VHD
HDL_exmple/EX4_VHDL/QUEUE.VHD
HDL_exmple/EX4_VHDL/tb_traffic.vhd
covlen2
covlen2/ConvEncdTestBnch.v
covlen2/ConEncdJprj.mpf
covlen2/ConvEncdJA.bak
covlen2/ConvEncdJA.v
covlen2/vsim.wlf
covlen2/ConEncdJprj.cr.mti
covlen2/work
covlen2/work/_info
covlen2/work/@conv@encd@test@bnch
covlen2/work/@conv@encd@test@bnch/_primary.vhd
covlen2/work/@conv@encd@test@bnch/verilog.asm
covlen2/work/@conv@encd@test@bnch/_primary.dat
covlen2/work/top_encode
covlen2/work/top_encode/_primary.vhd
covlen2/work/top_encode/verilog.asm
covlen2/work/top_encode/_primary.dat
covlen2/work/conv_encode
covlen2/work/conv_encode/_primary.vhd
covlen2/work/conv_encode/verilog.asm
covlen2/work/conv_encode/_primary.dat
covlen2/work/ser2par
covlen2/work/ser2par/_primary.vhd
covlen2/work/ser2par/verilog.asm
covlen2/work/ser2par/_primary.dat
covlen3
covlen3/dff.v
covlen3/convl3_en.v
covlen3/convlen3_test.v
covlen3/ASIC_Book_Encoder.mpf
covlen3/vsim.wlf
covlen3/ASIC_Book_Encoder.cr.mti
covlen3/work
covlen3/work/_info
covlen3/work/dff
covlen3/work/dff/_primary.vhd
covlen3/work/dff/verilog.asm
covlen3/work/dff/_primary.dat
covlen3/work/convl3_en
covlen3/work/convl3_en/_primary.vhd
covlen3/work/convl3_en/verilog.asm
covlen3/work/convl3_en/_primary.dat
covlen3/work/convlen3_test
covlen3/work/convlen3_test/_primary.vhd
covlen3/work/convlen3_test/verilog.asm
covlen3/work/convlen3_test/_primary.dat
covlen
covlen/convlen_test.v
covlen/dff.v
covlen/convl_en.v
keyscan
keyscan/keyscanprj.mpf
keyscan/vsim.wlf
keyscan/keyscan.v
keyscan/keyscan_test.v
keyscan/modelsim.tcl
keyscan/keyscan
keyscan/keyscanprj.cr.mti
keyscan/work
keyscan/work/_info
keyscan/work/keyscan_test
keyscan/work/keyscan_test/_primary.vhd
keyscan/work/keyscan_test/verilog.asm
keyscan/work/keyscan_test/_primary.dat
keyscan/work/keyscan_test/fast.asm
keyscan/work/keyscan_test/fast.dt2
keyscan/work/keyscan
keyscan/work/keyscan/_primary.vhd
keyscan/work/keyscan/verilog.asm
keyscan/work/keyscan/_primary.dat
keyscan/work/keyscan/fast.dt2
www.dssz.com.txt
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