文件名称:turbo码 IP core
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- 上传时间:2011-03-16
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文件大小:152.31kb
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已下载:1次
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turbo码 IP core, VHDL编写,Altera公司的,用于信道编码中turbo码的译码
相关搜索: turbo码 IP core
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压缩包 : turbo decoder IP core.rar 列表 turbo decoder IP core\doc\LICENSE.txt turbo decoder IP core\doc\README.txt turbo decoder IP core\doc\turbo.pdf turbo decoder IP core\makeDist turbo decoder IP core\src\myhdl\acs.py turbo decoder IP core\src\myhdl\args.py turbo decoder IP core\src\myhdl\clock.py turbo decoder IP core\src\myhdl\coder.py turbo decoder IP core\src\myhdl\distances.py turbo decoder IP core\src\myhdl\extInf.py turbo decoder IP core\src\myhdl\interleaver.py turbo decoder IP core\src\myhdl\iteration.py turbo decoder IP core\src\myhdl\launchTurbo.py turbo decoder IP core\src\myhdl\limiter.py turbo decoder IP core\src\myhdl\misc.py turbo decoder IP core\src\myhdl\noiser.py turbo decoder IP core\src\myhdl\permut.py turbo decoder IP core\src\myhdl\punct.py turbo decoder IP core\src\myhdl\select.py turbo decoder IP core\src\myhdl\sova.py turbo decoder IP core\src\myhdl\synthesis.py turbo decoder IP core\src\myhdl\testbench.py turbo decoder IP core\src\myhdl\trellis.py turbo decoder IP core\src\myhdl\turboTop.py turbo decoder IP core\src\vhdl\abPermut_e.vhd turbo decoder IP core\src\vhdl\abPermut_synth.vhd turbo decoder IP core\src\vhdl\accDistSel_e.vhd turbo decoder IP core\src\vhdl\accDistSel_synth.vhd turbo decoder IP core\src\vhdl\accDist_e.vhd turbo decoder IP core\src\vhdl\accDist_synth.vhd turbo decoder IP core\src\vhdl\acs_e.vhd turbo decoder IP core\src\vhdl\acs_synth.vhd turbo decoder IP core\src\vhdl\adder_e.vhd turbo decoder IP core\src\vhdl\adder_synth.vhd turbo decoder IP core\src\vhdl\clkDiv_e.vhd turbo decoder IP core\src\vhdl\clkDiv_synth.vhd turbo decoder IP core\src\vhdl\clkrst_beh.vhd turbo decoder IP core\src\vhdl\clkrst_e.vhd turbo decoder IP core\src\vhdl\cmp2_e.vhd turbo decoder IP core\src\vhdl\cmp2_synth.vhd turbo decoder IP core\src\vhdl\cod2_e.vhd turbo decoder IP core\src\vhdl\cod2_synth.vhd turbo decoder IP core\src\vhdl\cod3_e.vhd turbo decoder IP core\src\vhdl\cod3_synth.vhd turbo decoder IP core\src\vhdl\coder_e.vhd turbo decoder IP core\src\vhdl\coder_synth.vhd turbo decoder IP core\src\vhdl\delayer_e.vhd turbo decoder IP core\src\vhdl\delayer_synth.vhd turbo decoder IP core\src\vhdl\distances_e.vhd turbo decoder IP core\src\vhdl\distances_synth.vhd turbo decoder IP core\src\vhdl\distance_e.vhd turbo decoder IP core\src\vhdl\distance_synth.vhd turbo decoder IP core\src\vhdl\extInf_e.vhd turbo decoder IP core\src\vhdl\extInf_synth.vhd turbo decoder IP core\src\vhdl\interleaver_e.vhd turbo decoder IP core\src\vhdl\interleaver_synth.vhd turbo decoder IP core\src\vhdl\iteration_e.vhd turbo decoder IP core\src\vhdl\iteration_synth.vhd turbo decoder IP core\src\vhdl\limiter_e.vhd turbo decoder IP core\src\vhdl\limiter_synth.vhd turbo decoder IP core\src\vhdl\min4_e.vhd turbo decoder IP core\src\vhdl\min4_synth.vhd turbo decoder IP core\src\vhdl\min8_e.vhd turbo decoder IP core\src\vhdl\min8_synth.vhd turbo decoder IP core\src\vhdl\mux2_e.vhd turbo decoder IP core\src\vhdl\mux2_synth.vhd turbo decoder IP core\src\vhdl\mux4_e.vhd turbo decoder IP core\src\vhdl\mux4_synth.vhd turbo decoder IP core\src\vhdl\mux8_e.vhd turbo decoder IP core\src\vhdl\mux8_synth.vhd turbo decoder IP core\src\vhdl\opposite_e.vhd turbo decoder IP core\src\vhdl\opposite_synth.vhd turbo decoder IP core\src\vhdl\partDistance_e.vhd turbo decoder IP core\src\vhdl\partDistance_synth.vhd turbo decoder IP core\src\vhdl\punct_e.vhd turbo decoder IP core\src\vhdl\punct_synth.vhd turbo decoder IP core\src\vhdl\reduction_e.vhd turbo decoder IP core\src\vhdl\reduction_synth.vhd turbo decoder IP core\src\vhdl\reg_e.vhd turbo decoder IP core\src\vhdl\reg_synth.vhd turbo decoder IP core\src\vhdl\sova_e.vhd turbo decoder IP core\src\vhdl\sova_synth.vhd turbo decoder IP core\src\vhdl\stateSel_e.vhd turbo decoder IP core\src\vhdl\stateSel_synth.vhd turbo decoder IP core\src\vhdl\subs_e.vhd turbo decoder IP core\src\vhdl\subs_synth.vhd turbo decoder IP core\src\vhdl\trellis1_e.vhd turbo decoder IP core\src\vhdl\trellis1_synth.vhd turbo decoder IP core\src\vhdl\trellis2_e.vhd turbo decoder IP core\src\vhdl\trellis2_synth.vhd turbo decoder IP core\src\vhdl\turboDec_e.vhd turbo decoder IP core\src\vhdl\turboDec_synth.vhd turbo decoder IP core\src\vhdl\turbopack.vhd turbo decoder IP core\src\vhdl\zPermut_e.vhd turbo decoder IP core\src\vhdl\zPermut_synth.vhd turbo decoder IP core\说明.txt turbo decoder IP core\src\myhdl turbo decoder IP core\src\vhdl turbo decoder IP core\doc turbo decoder IP core\src turbo decoder IP core
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