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文件名称:LCD.基于FPGA的LCD1602驱动

  • 所属分类：
    其他小程序
  • 标签属性：
    [VHDL] [源码]
  • 上传时间：
    2012-09-02
  • 文件大小：
    1.05mb
  • 已下载：
    1次
  • 提 供 者：
    liang*****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

基于FPGA的LCD1602驱动，verilog代码，已经调试成功,LCD1602-driven FPGA-based, verilog code debugging has been successful
相关搜索： lcd verilog lcd1602 veril LCD1602 veril Verilog LCD1602 fpga 1602 veril verilog lcd16 verilog LCD

(系统自动生成,下载前可以参看下载内容)

下载文件列表

LCD实验/Project/LCD_1602/constraint/LCD_Top.pdc
LCD实验/Project/LCD_1602/designer/impl1/designer.log
LCD实验/Project/LCD_1602/designer/impl1/LCD_Driver.ide_des
LCD实验/Project/LCD_1602/designer/impl1/LCD_Top.adb
LCD实验/Project/LCD_1602/designer/impl1/LCD_Top.dtf/verify.log
LCD实验/Project/LCD_1602/designer/impl1/LCD_Top.ide_des
LCD实验/Project/LCD_1602/designer/impl1/LCD_Top.pdb
LCD实验/Project/LCD_1602/designer/impl1/LCD_Top.pdb.depends
LCD实验/Project/LCD_1602/designer/impl1/LCD_Top.plk
LCD实验/Project/LCD_1602/designer/impl1/LCD_Top.tcl
LCD实验/Project/LCD_1602/designer/impl1/LCD_Top_ba.sdf
LCD实验/Project/LCD_1602/designer/impl1/LCD_Top_ba.v
LCD实验/Project/LCD_1602/designer/impl1/LCD_Top_fp/LCD_Top.log
LCD实验/Project/LCD_1602/designer/impl1/LCD_Top_fp/LCD_Top.pro
LCD实验/Project/LCD_1602/designer/impl1/PLL_1M.ide_des
LCD实验/Project/LCD_1602/hdl/Clock_Gen.v
LCD实验/Project/LCD_1602/hdl/LCD_Driver.v
LCD实验/Project/LCD_1602/hdl/LCD_Top.v
LCD实验/Project/LCD_1602/LCD_1602.prj
LCD实验/Project/LCD_1602/simulation/meminit.dat
LCD实验/Project/LCD_1602/simulation/modelsim.ini
LCD实验/Project/LCD_1602/simulation/modelsim.ini.sav
LCD实验/Project/LCD_1602/smartgen/PLL_1M/PLL_1M.cxf
LCD实验/Project/LCD_1602/smartgen/PLL_1M/PLL_1M.gen
LCD实验/Project/LCD_1602/smartgen/PLL_1M/PLL_1M.log
LCD实验/Project/LCD_1602/smartgen/PLL_1M/PLL_1M.v
LCD实验/Project/LCD_1602/smartgen/PLL_1M_work.ixf
LCD实验/Project/LCD_1602/smartgen/smartgen.aws
LCD实验/Project/LCD_1602/stimulus/BtimErrors.log
LCD实验/Project/LCD_1602/stimulus/LCD_Top.dsk
LCD实验/Project/LCD_1602/stimulus/LCD_Top.hpj
LCD实验/Project/LCD_1602/stimulus/waveperl.log
LCD实验/Project/LCD_1602/synthesis/.recordref
LCD实验/Project/LCD_1602/synthesis/designer/convert.log
LCD实验/Project/LCD_1602/synthesis/designer/convert.tcl
LCD实验/Project/LCD_1602/synthesis/designer/impl1/impl.prj_des
LCD实验/Project/LCD_1602/synthesis/LCD_Top.areasrr
LCD实验/Project/LCD_1602/synthesis/LCD_Top.edn
LCD实验/Project/LCD_1602/synthesis/LCD_Top.fse
LCD实验/Project/LCD_1602/synthesis/LCD_Top.htm
LCD实验/Project/LCD_1602/synthesis/LCD_Top.map
LCD实验/Project/LCD_1602/synthesis/LCD_Top.sap
LCD实验/Project/LCD_1602/synthesis/LCD_Top.sdf
LCD实验/Project/LCD_1602/synthesis/LCD_Top.srd
LCD实验/Project/LCD_1602/synthesis/LCD_Top.srm
LCD实验/Project/LCD_1602/synthesis/LCD_Top.srr
LCD实验/Project/LCD_1602/synthesis/LCD_Top.srs
LCD实验/Project/LCD_1602/synthesis/LCD_Top.tlg
LCD实验/Project/LCD_1602/synthesis/LCD_Top_sdc.sdc
LCD实验/Project/LCD_1602/synthesis/LCD_Top_syn.prj
LCD实验/Project/LCD_1602/synthesis/LCD_Top_syn.prj.convert.sav
LCD实验/Project/LCD_1602/synthesis/simulation/modelsim.ini
LCD实验/Project/LCD_1602/synthesis/simulation/modelsim.ini.sav
LCD实验/Project/LCD_1602/synthesis/stdout.log
LCD实验/Project/LCD_1602/synthesis/syntmp/LCD_Top.msg
LCD实验/Project/LCD_1602/synthesis/syntmp/LCD_Top.plg
LCD实验/Project/LCD_1602/synthesis/syntmp/LCD_Top_flink.htm
LCD实验/Project/LCD_1602/synthesis/syntmp/LCD_Top_srr.htm
LCD实验/Project/LCD_1602/synthesis/syntmp/LCD_Top_toc.htm
LCD实验/Project/LCD_1602/synthesis/syntmp/sap.log
LCD实验/Project/LCD_1602/synthesis/traplog.tlg
LCD实验/Project/LCD_1602/synthesis/viewdraw/vf/project.lst
LCD实验/Project/LCD_1602/synthesis/viewdraw/viewdraw.ini
LCD实验/Project/LCD_1602/synthesis.zip
LCD实验/Project/LCD_1602/viewdraw/vf/project.lst
LCD实验/Project/LCD_1602/viewdraw/viewdraw.ini
LCD实验/Project/LCD_1602.zip
LCD实验/Source File/Clock_Gen.v
LCD实验/Source File/LCD_Driver.v
LCD实验/Source File/LCD_Top.v
LCD实验/Project/LCD_1602/synthesis/designer/impl1/simulation
LCD实验/Project/LCD_1602/synthesis/designer/impl2/simulation
LCD实验/Project/LCD_1602/designer/impl1/LCD_Top.dtf
LCD实验/Project/LCD_1602/designer/impl1/LCD_Top_fp
LCD实验/Project/LCD_1602/designer/impl1/simulation
LCD实验/Project/LCD_1602/synthesis/designer/impl1
LCD实验/Project/LCD_1602/synthesis/designer/impl2
LCD实验/Project/LCD_1602/synthesis/viewdraw/sch
LCD实验/Project/LCD_1602/synthesis/viewdraw/sym
LCD实验/Project/LCD_1602/synthesis/viewdraw/vf
LCD实验/Project/LCD_1602/synthesis/viewdraw/wir
LCD实验/Project/LCD_1602/designer/impl1
LCD实验/Project/LCD_1602/smartgen/PLL_1M
LCD实验/Project/LCD_1602/synthesis/actgen
LCD实验/Project/LCD_1602/synthesis/component
LCD实验/Project/LCD_1602/synthesis/constraint
LCD实验/Project/LCD_1602/synthesis/coreconsole
LCD实验/Project/LCD_1602/synthesis/designer
LCD实验/Project/LCD_1602/synthesis/hdl
LCD实验/Project/LCD_1602/synthesis/phy_synthesis
LCD实验/Project/LCD_1602/synthesis/simulation
LCD实验/Project/LCD_1602/synthesis/smartgen
LCD实验/Project/LCD_1602/synthesis/stimulus
LCD实验/Project/LCD_1602/synthesis/synthesis
LCD实验/Project/LCD_1602/synthesis/syntmp
LCD实验/Project/LCD_1602/synthesis/viewdraw
LCD实验/Project/LCD_1602/viewdraw/sch
LCD实验/Project/LCD_1602/viewdraw/sym
LCD实验/Project/LCD_1602/viewdraw/vf
LCD实验/Project/LCD_1602/viewdraw/wir
LCD实验/Project/LCD_1602/component
LCD实验/Project/LCD_1602/constraint
LCD实验/Project/LCD_1602/coreconsole
LCD实验/Project/LCD_1602/designer
LCD实验/Project/LCD_1602/hdl
LCD实验/Project/LCD_1602/phy_synthesis
LCD实验/Project/LCD_1602/simulation
LCD实验/Project/LCD_1602/smartgen
LCD实验/Project/LCD_1602/stimulus
LCD实验/Project/LCD_1602/synthesis
LCD实验/Project/LCD_1602/viewdraw
LCD实验/Project/LCD_1602
LCD实验/Project
LCD实验/Source File
LCD实验

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