文件名称:sdram-control-verilog
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- 上传时间:2012-10-19
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文件大小:968.48kb
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已下载:2次
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SDRAM控制器源码,内含完整的控制器verilog源代码和测试代码,超值哈。-This readme file for the SDR SDRAM Controller includes information that was not
incorporated into the SDR SDRAM Controller White Paper v1.1.
incorporated into the SDR SDRAM Controller White Paper v1.1.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
doc
simulation
simulation/sdr_sdram_tb.v
simulation/transcript
source
source/altclklock.v
source/Command.v
source/compile_all.v
source/control_interface.v
source/Params.v
source/PLL1.v
source/sdr_data_path.v
source/sdr_sdram.v
source/transcript
readme_sdr_sdram.txt
sdr_sdram.pdf
simulation
simulation/sdr_sdram_tb.v
simulation/transcript
source
source/altclklock.v
source/Command.v
source/compile_all.v
source/control_interface.v
source/Params.v
source/PLL1.v
source/sdr_data_path.v
source/sdr_sdram.v
source/transcript
readme_sdr_sdram.txt
sdr_sdram.pdf
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