文件名称:ARMcore
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- 上传时间:2012-10-27
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文件大小:674.49kb
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已下载:1次
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基于FPGA的ARM IP核!该软核VHDL源码全部开放-FPGA-based ARM IP core! The soft core VHDL source code are all open
(系统自动生成,下载前可以参看下载内容)
下载文件列表
ARMcore/ARM.qpf
ARMcore/ARM.qsf
ARMcore/ARM.qws
ARMcore/ARMCORE/26_1000/Adder.v
ARMcore/ARMCORE/26_1000/ALUComb.v
ARMcore/ARMCORE/26_1000/ALUShell.v
ARMcore/ARMCORE/26_1000/bak/Arbitrator.v
ARMcore/ARMCORE/26_1000/bak/BusTransfer.v
ARMcore/ARMCORE/26_1000/bak/CacheMemory.v
ARMcore/ARMCORE/26_1000/bak/CAM.v
ARMcore/ARMCORE/26_1000/bak/datac2.v
ARMcore/ARMCORE/26_1000/bak/DataCacheController.v
ARMcore/ARMCORE/26_1000/bak/DataCacheMemory.v
ARMcore/ARMCORE/26_1000/bak/Def_ComponentEntry.v
ARMcore/ARMCORE/26_1000/bak/InstructionCacheController.v
ARMcore/ARMCORE/26_1000/bak/InstructionPreFetch.v
ARMcore/ARMCORE/26_1000/bak/MemoryController.v
ARMcore/ARMCORE/26_1000/bak/MemoryMux.v
ARMcore/ARMCORE/26_1000/bak/nnARM.v
ARMcore/ARMCORE/26_1000/bak/nnARM11.v
ARMcore/ARMCORE/26_1000/bak/scr.cmd
ARMcore/ARMCORE/26_1000/bak/System.v
ARMcore/ARMCORE/26_1000/bak/tb_Adder.v
ARMcore/ARMCORE/26_1000/bak/tb_BarrelShift.v
ARMcore/ARMCORE/26_1000/bak/tb_complementary.v
ARMcore/ARMCORE/26_1000/bak/tb_Decoder_ARM.v
ARMcore/ARMCORE/26_1000/bak/tb_IF.v
ARMcore/ARMCORE/26_1000/bak/tb_InstructionPreFetch.v
ARMcore/ARMCORE/26_1000/bak/tb_RegisterFile.v
ARMcore/ARMCORE/26_1000/bak/tb_system_fft.v
ARMcore/ARMCORE/26_1000/bak/tb_tomasulo.v
ARMcore/ARMCORE/26_1000/bak/TestInstruction.v
ARMcore/ARMCORE/26_1000/BarrelShift.v
ARMcore/ARMCORE/26_1000/CanGoGen.v
ARMcore/ARMCORE/26_1000/complementary.v
ARMcore/ARMCORE/26_1000/Decoder_ARM.v
ARMcore/ARMCORE/26_1000/Def_ALUType.v
ARMcore/ARMCORE/26_1000/Def_ARMALU.v
ARMcore/ARMCORE/26_1000/Def_BarrelShift.v
ARMcore/ARMCORE/26_1000/Def_ConditionField.v
ARMcore/ARMCORE/26_1000/Def_DataCacheController.v
ARMcore/ARMCORE/26_1000/Def_Decoder.v
ARMcore/ARMCORE/26_1000/Def_Exception.v
ARMcore/ARMCORE/26_1000/Def_InstructionCacheController.v
ARMcore/ARMCORE/26_1000/Def_InstructionPreFetch.v
ARMcore/ARMCORE/26_1000/Def_mem.v
ARMcore/ARMCORE/26_1000/Def_MemoryController.v
ARMcore/ARMCORE/26_1000/Def_Mode.v
ARMcore/ARMCORE/26_1000/Def_psr.v
ARMcore/ARMCORE/26_1000/Def_RegisterFile.v
ARMcore/ARMCORE/26_1000/Def_SimulationParameter.v
ARMcore/ARMCORE/26_1000/Def_StructureParameter.v
ARMcore/ARMCORE/26_1000/D_Bus2Core.v
ARMcore/ARMCORE/26_1000/IF.v
ARMcore/ARMCORE/26_1000/InterruptPriority.v
ARMcore/ARMCORE/26_1000/I_Bus2Core.v
ARMcore/ARMCORE/26_1000/mem.v
ARMcore/ARMCORE/26_1000/MemoryController_WB_Beh.v
ARMcore/ARMCORE/26_1000/mul.v
ARMcore/ARMCORE/26_1000/nnARM.prog
ARMcore/ARMCORE/26_1000/nnARM.vpj
ARMcore/ARMCORE/26_1000/nnARM1.v
ARMcore/ARMCORE/26_1000/nnARMCore.v
ARMcore/ARMCORE/26_1000/psr.v
ARMcore/ARMCORE/26_1000/PSR_Fresh.v
ARMcore/ARMCORE/26_1000/README.TXT
ARMcore/ARMCORE/26_1000/RegisterFile.v
ARMcore/ARMCORE/26_1000/scr.cmd
ARMcore/ARMCORE/26_1000/scr1.cmd
ARMcore/ARMCORE/26_1000/scr3.cmd
ARMcore/ARMCORE/26_1000/tb_system.v
ARMcore/ARMCORE/26_1000/ThumbDecoderWarper.v
ARMcore/ARMCORE/26_1000/Thumb_2_nnARM.v
ARMcore/ARMCORE/26_1000/timescalar.v
ARMcore/ARMCORE/26_1000/transcript
ARMcore/ARMCORE/26_1000/WishBone_Arbiter.v
ARMcore/ARMCORE/26_1000/work/@a@l@u@comb/verilog.asm
ARMcore/ARMCORE/26_1000/work/@a@l@u@comb/_primary.dat
ARMcore/ARMCORE/26_1000/work/@a@l@u@comb/_primary.vhd
ARMcore/ARMCORE/26_1000/work/@a@l@u@shell/verilog.asm
ARMcore/ARMCORE/26_1000/work/@a@l@u@shell/_primary.dat
ARMcore/ARMCORE/26_1000/work/@a@l@u@shell/_primary.vhd
ARMcore/ARMCORE/26_1000/work/@barrel@shift/verilog.asm
ARMcore/ARMCORE/26_1000/work/@barrel@shift/_primary.dat
ARMcore/ARMCORE/26_1000/work/@barrel@shift/_primary.vhd
ARMcore/ARMCORE/26_1000/work/@can@go@gen/verilog.asm
ARMcore/ARMCORE/26_1000/work/@can@go@gen/_primary.dat
ARMcore/ARMCORE/26_1000/work/@can@go@gen/_primary.vhd
ARMcore/ARMCORE/26_1000/work/@decoder_@a@r@m/verilog.asm
ARMcore/ARMCORE/26_1000/work/@decoder_@a@r@m/_primary.dat
ARMcore/ARMCORE/26_1000/work/@decoder_@a@r@m/_primary.vhd
ARMcore/ARMCORE/26_1000/work/@d_@bus2@core/verilog.asm
ARMcore/ARMCORE/26_1000/work/@d_@bus2@core/_primary.dat
ARMcore/ARMCORE/26_1000/work/@d_@bus2@core/_primary.vhd
ARMcore/ARMCORE/26_1000/work/@i@f/verilog.asm
ARMcore/ARMCORE/26_1000/work/@i@f/_primary.dat
ARMcore/ARMCORE/26_1000/work/@i@f/_primary.vhd
ARMcore/ARMCORE/26_1000/work/@interrupt@priority/verilog.asm
ARMcore/ARMCORE/26_1000/work/@interrupt@priority/_primary.dat
ARMcore/ARMCORE/26_1000/work/@interrupt@priority/_primary.vhd
ARMcore/ARMCORE/26_1000/work/@i_@bus2@core/verilog.asm
ARMcore/ARMCORE/26_1000/work/@i_@bus2@core/_primary.dat
ARMcore/ARMCORE/26_1000/work/@i_@bus2@core/_primary.vhd
ARMcore/ARMCORE/26_1000/work/@m@e@m/verilog.asm
ARMcore/ARMCORE/26_1000/work/@m@e@m/_primary.dat
ARMcore/ARMCORE/26_1000/work/@m@e@m/_primary.vhd
ARMcore/ARMCORE/26_1000/work/@memory@controller_@w@b_@bhv/verilog.asm
ARMcore/ARMCORE/26_1000/work/@memory@controller_@w@b_@bhv/_primary.dat
ARMcore/ARMCORE/26_1000/work/@memory@controller_@w@b_@bhv/_primary.vhd
ARMcore/ARMCORE/26_1000/work/@p@s@r_@fresh/verilog.asm
ARMcore/ARMCORE/26_1000/work/@p@s@r_@fresh/_primary.dat
ARMcore/ARMCORE/26_1000/work/@p@s@r_@fresh/_primary.vhd
ARMcore/ARMCORE/26_1000/work/@register@file/verilog.asm
ARMcore/ARMCORE/26_1000/work/@register@file/_primary.dat
ARMcore/ARMCOR
ARMcore/ARM.qsf
ARMcore/ARM.qws
ARMcore/ARMCORE/26_1000/Adder.v
ARMcore/ARMCORE/26_1000/ALUComb.v
ARMcore/ARMCORE/26_1000/ALUShell.v
ARMcore/ARMCORE/26_1000/bak/Arbitrator.v
ARMcore/ARMCORE/26_1000/bak/BusTransfer.v
ARMcore/ARMCORE/26_1000/bak/CacheMemory.v
ARMcore/ARMCORE/26_1000/bak/CAM.v
ARMcore/ARMCORE/26_1000/bak/datac2.v
ARMcore/ARMCORE/26_1000/bak/DataCacheController.v
ARMcore/ARMCORE/26_1000/bak/DataCacheMemory.v
ARMcore/ARMCORE/26_1000/bak/Def_ComponentEntry.v
ARMcore/ARMCORE/26_1000/bak/InstructionCacheController.v
ARMcore/ARMCORE/26_1000/bak/InstructionPreFetch.v
ARMcore/ARMCORE/26_1000/bak/MemoryController.v
ARMcore/ARMCORE/26_1000/bak/MemoryMux.v
ARMcore/ARMCORE/26_1000/bak/nnARM.v
ARMcore/ARMCORE/26_1000/bak/nnARM11.v
ARMcore/ARMCORE/26_1000/bak/scr.cmd
ARMcore/ARMCORE/26_1000/bak/System.v
ARMcore/ARMCORE/26_1000/bak/tb_Adder.v
ARMcore/ARMCORE/26_1000/bak/tb_BarrelShift.v
ARMcore/ARMCORE/26_1000/bak/tb_complementary.v
ARMcore/ARMCORE/26_1000/bak/tb_Decoder_ARM.v
ARMcore/ARMCORE/26_1000/bak/tb_IF.v
ARMcore/ARMCORE/26_1000/bak/tb_InstructionPreFetch.v
ARMcore/ARMCORE/26_1000/bak/tb_RegisterFile.v
ARMcore/ARMCORE/26_1000/bak/tb_system_fft.v
ARMcore/ARMCORE/26_1000/bak/tb_tomasulo.v
ARMcore/ARMCORE/26_1000/bak/TestInstruction.v
ARMcore/ARMCORE/26_1000/BarrelShift.v
ARMcore/ARMCORE/26_1000/CanGoGen.v
ARMcore/ARMCORE/26_1000/complementary.v
ARMcore/ARMCORE/26_1000/Decoder_ARM.v
ARMcore/ARMCORE/26_1000/Def_ALUType.v
ARMcore/ARMCORE/26_1000/Def_ARMALU.v
ARMcore/ARMCORE/26_1000/Def_BarrelShift.v
ARMcore/ARMCORE/26_1000/Def_ConditionField.v
ARMcore/ARMCORE/26_1000/Def_DataCacheController.v
ARMcore/ARMCORE/26_1000/Def_Decoder.v
ARMcore/ARMCORE/26_1000/Def_Exception.v
ARMcore/ARMCORE/26_1000/Def_InstructionCacheController.v
ARMcore/ARMCORE/26_1000/Def_InstructionPreFetch.v
ARMcore/ARMCORE/26_1000/Def_mem.v
ARMcore/ARMCORE/26_1000/Def_MemoryController.v
ARMcore/ARMCORE/26_1000/Def_Mode.v
ARMcore/ARMCORE/26_1000/Def_psr.v
ARMcore/ARMCORE/26_1000/Def_RegisterFile.v
ARMcore/ARMCORE/26_1000/Def_SimulationParameter.v
ARMcore/ARMCORE/26_1000/Def_StructureParameter.v
ARMcore/ARMCORE/26_1000/D_Bus2Core.v
ARMcore/ARMCORE/26_1000/IF.v
ARMcore/ARMCORE/26_1000/InterruptPriority.v
ARMcore/ARMCORE/26_1000/I_Bus2Core.v
ARMcore/ARMCORE/26_1000/mem.v
ARMcore/ARMCORE/26_1000/MemoryController_WB_Beh.v
ARMcore/ARMCORE/26_1000/mul.v
ARMcore/ARMCORE/26_1000/nnARM.prog
ARMcore/ARMCORE/26_1000/nnARM.vpj
ARMcore/ARMCORE/26_1000/nnARM1.v
ARMcore/ARMCORE/26_1000/nnARMCore.v
ARMcore/ARMCORE/26_1000/psr.v
ARMcore/ARMCORE/26_1000/PSR_Fresh.v
ARMcore/ARMCORE/26_1000/README.TXT
ARMcore/ARMCORE/26_1000/RegisterFile.v
ARMcore/ARMCORE/26_1000/scr.cmd
ARMcore/ARMCORE/26_1000/scr1.cmd
ARMcore/ARMCORE/26_1000/scr3.cmd
ARMcore/ARMCORE/26_1000/tb_system.v
ARMcore/ARMCORE/26_1000/ThumbDecoderWarper.v
ARMcore/ARMCORE/26_1000/Thumb_2_nnARM.v
ARMcore/ARMCORE/26_1000/timescalar.v
ARMcore/ARMCORE/26_1000/transcript
ARMcore/ARMCORE/26_1000/WishBone_Arbiter.v
ARMcore/ARMCORE/26_1000/work/@a@l@u@comb/verilog.asm
ARMcore/ARMCORE/26_1000/work/@a@l@u@comb/_primary.dat
ARMcore/ARMCORE/26_1000/work/@a@l@u@comb/_primary.vhd
ARMcore/ARMCORE/26_1000/work/@a@l@u@shell/verilog.asm
ARMcore/ARMCORE/26_1000/work/@a@l@u@shell/_primary.dat
ARMcore/ARMCORE/26_1000/work/@a@l@u@shell/_primary.vhd
ARMcore/ARMCORE/26_1000/work/@barrel@shift/verilog.asm
ARMcore/ARMCORE/26_1000/work/@barrel@shift/_primary.dat
ARMcore/ARMCORE/26_1000/work/@barrel@shift/_primary.vhd
ARMcore/ARMCORE/26_1000/work/@can@go@gen/verilog.asm
ARMcore/ARMCORE/26_1000/work/@can@go@gen/_primary.dat
ARMcore/ARMCORE/26_1000/work/@can@go@gen/_primary.vhd
ARMcore/ARMCORE/26_1000/work/@decoder_@a@r@m/verilog.asm
ARMcore/ARMCORE/26_1000/work/@decoder_@a@r@m/_primary.dat
ARMcore/ARMCORE/26_1000/work/@decoder_@a@r@m/_primary.vhd
ARMcore/ARMCORE/26_1000/work/@d_@bus2@core/verilog.asm
ARMcore/ARMCORE/26_1000/work/@d_@bus2@core/_primary.dat
ARMcore/ARMCORE/26_1000/work/@d_@bus2@core/_primary.vhd
ARMcore/ARMCORE/26_1000/work/@i@f/verilog.asm
ARMcore/ARMCORE/26_1000/work/@i@f/_primary.dat
ARMcore/ARMCORE/26_1000/work/@i@f/_primary.vhd
ARMcore/ARMCORE/26_1000/work/@interrupt@priority/verilog.asm
ARMcore/ARMCORE/26_1000/work/@interrupt@priority/_primary.dat
ARMcore/ARMCORE/26_1000/work/@interrupt@priority/_primary.vhd
ARMcore/ARMCORE/26_1000/work/@i_@bus2@core/verilog.asm
ARMcore/ARMCORE/26_1000/work/@i_@bus2@core/_primary.dat
ARMcore/ARMCORE/26_1000/work/@i_@bus2@core/_primary.vhd
ARMcore/ARMCORE/26_1000/work/@m@e@m/verilog.asm
ARMcore/ARMCORE/26_1000/work/@m@e@m/_primary.dat
ARMcore/ARMCORE/26_1000/work/@m@e@m/_primary.vhd
ARMcore/ARMCORE/26_1000/work/@memory@controller_@w@b_@bhv/verilog.asm
ARMcore/ARMCORE/26_1000/work/@memory@controller_@w@b_@bhv/_primary.dat
ARMcore/ARMCORE/26_1000/work/@memory@controller_@w@b_@bhv/_primary.vhd
ARMcore/ARMCORE/26_1000/work/@p@s@r_@fresh/verilog.asm
ARMcore/ARMCORE/26_1000/work/@p@s@r_@fresh/_primary.dat
ARMcore/ARMCORE/26_1000/work/@p@s@r_@fresh/_primary.vhd
ARMcore/ARMCORE/26_1000/work/@register@file/verilog.asm
ARMcore/ARMCORE/26_1000/work/@register@file/_primary.dat
ARMcore/ARMCOR
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