文件名称:DE0_D5M
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- 上传时间:2012-11-12
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文件大小:1.19mb
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这是在DE0板上实现的用D5M+VGA的图像实时显示程序,完整工程-This is achieved in DE0 board D5M+ VGA images with real-time display program, complete project
(系统自动生成,下载前可以参看下载内容)
下载文件列表
DE0_D5M/DE0_D5M.pin
DE0_D5M/DE0_D5M.qpf
DE0_D5M/DE0_D5M.qsf
DE0_D5M/DE0_D5M.sof
DE0_D5M/DE0_D5M.v
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.autos_3e92b2e5d298f5cf757a393f7655ccd81.map.atm
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.autos_3e92b2e5d298f5cf757a393f7655ccd81.map.hdbx
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.autos_3e92b2e5d298f5cf757a393f7655ccd81.map.kpt
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.autos_3e92b2e5d298f5cf757a393f7655ccd81.map.logdb
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.root_partition.cmp.atm
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.root_partition.cmp.dfp
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.root_partition.cmp.hdbx
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.root_partition.cmp.kpt
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.root_partition.cmp.logdb
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.root_partition.cmp.rcf
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.root_partition.map.atm
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.root_partition.map.dpi
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.root_partition.map.hdbx
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.root_partition.map.kpt
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.root_partition.merge_hb.atm
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.atm
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.dpi
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.hdbx
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.kpt
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.logdb
DE0_D5M/incremental_db/compiled_partitions
DE0_D5M/incremental_db/README
DE0_D5M/incremental_db
DE0_D5M/Sdram_Control_4Port/command.v
DE0_D5M/Sdram_Control_4Port/control_interface.v
DE0_D5M/Sdram_Control_4Port/Sdram_Control_4Port.v
DE0_D5M/Sdram_Control_4Port/Sdram_FIFO.v
DE0_D5M/Sdram_Control_4Port/Sdram_Params.h
DE0_D5M/Sdram_Control_4Port/sdr_data_path.v
DE0_D5M/Sdram_Control_4Port
DE0_D5M/V/CCD_Capture.v
DE0_D5M/V/CCD_Capture.v.bak
DE0_D5M/V/debounce.vhd
DE0_D5M/V/I2C_CCD_Config.v
DE0_D5M/V/I2C_CCD_Config.v.bak
DE0_D5M/V/I2C_Controller.v
DE0_D5M/V/Line_Buffer.v
DE0_D5M/V/RAW2RGB.v
DE0_D5M/V/Reset_Delay.v
DE0_D5M/V/Reset_Delay.v.bak
DE0_D5M/V/sdram_pll.bsf
DE0_D5M/V/sdram_pll.ppf
DE0_D5M/V/sdram_pll.qip
DE0_D5M/V/sdram_pll.v
DE0_D5M/V/sdram_pll_wave0.jpg
DE0_D5M/V/sdram_pll_waveforms.html
DE0_D5M/V/VGA_Controller.v
DE0_D5M/V/VGA_Controller.v.bak
DE0_D5M/V/VGA_Param.h
DE0_D5M/V
DE0_D5M
DE0_D5M/DE0_D5M.qpf
DE0_D5M/DE0_D5M.qsf
DE0_D5M/DE0_D5M.sof
DE0_D5M/DE0_D5M.v
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.autos_3e92b2e5d298f5cf757a393f7655ccd81.map.atm
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.autos_3e92b2e5d298f5cf757a393f7655ccd81.map.hdbx
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.autos_3e92b2e5d298f5cf757a393f7655ccd81.map.kpt
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.autos_3e92b2e5d298f5cf757a393f7655ccd81.map.logdb
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.root_partition.cmp.atm
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.root_partition.cmp.dfp
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.root_partition.cmp.hdbx
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.root_partition.cmp.kpt
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.root_partition.cmp.logdb
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.root_partition.cmp.rcf
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.root_partition.map.atm
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.root_partition.map.dpi
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.root_partition.map.hdbx
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.root_partition.map.kpt
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.root_partition.merge_hb.atm
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.atm
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.dpi
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.hdbx
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.kpt
DE0_D5M/incremental_db/compiled_partitions/DE0_D5M.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.logdb
DE0_D5M/incremental_db/compiled_partitions
DE0_D5M/incremental_db/README
DE0_D5M/incremental_db
DE0_D5M/Sdram_Control_4Port/command.v
DE0_D5M/Sdram_Control_4Port/control_interface.v
DE0_D5M/Sdram_Control_4Port/Sdram_Control_4Port.v
DE0_D5M/Sdram_Control_4Port/Sdram_FIFO.v
DE0_D5M/Sdram_Control_4Port/Sdram_Params.h
DE0_D5M/Sdram_Control_4Port/sdr_data_path.v
DE0_D5M/Sdram_Control_4Port
DE0_D5M/V/CCD_Capture.v
DE0_D5M/V/CCD_Capture.v.bak
DE0_D5M/V/debounce.vhd
DE0_D5M/V/I2C_CCD_Config.v
DE0_D5M/V/I2C_CCD_Config.v.bak
DE0_D5M/V/I2C_Controller.v
DE0_D5M/V/Line_Buffer.v
DE0_D5M/V/RAW2RGB.v
DE0_D5M/V/Reset_Delay.v
DE0_D5M/V/Reset_Delay.v.bak
DE0_D5M/V/sdram_pll.bsf
DE0_D5M/V/sdram_pll.ppf
DE0_D5M/V/sdram_pll.qip
DE0_D5M/V/sdram_pll.v
DE0_D5M/V/sdram_pll_wave0.jpg
DE0_D5M/V/sdram_pll_waveforms.html
DE0_D5M/V/VGA_Controller.v
DE0_D5M/V/VGA_Controller.v.bak
DE0_D5M/V/VGA_Param.h
DE0_D5M/V
DE0_D5M
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