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文件名称:core3DES

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [ASM] [源码]
  • 上传时间：
    2012-11-16
  • 文件大小：
    1.8mb
  • 已下载：
    0次
  • 提 供 者：
    e****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

Full Des Simulation Code
相关搜索： des vhdl DES VHDL code of DES DES VHDL Code des simulation

(系统自动生成,下载前可以参看下载内容)

下载文件列表

Core3DES_eval/
Core3DES_eval/doc/
Core3DES_eval/doc/CHANGES.txt
Core3DES_eval/doc/Core3DES_DS.pdf
Core3DES_eval/doc/Core3DES_RN.pdf
Core3DES_eval/doc/CoreDES_Core3DES_CL.pdf
Core3DES_eval/doc/CoreDES_Core3DES_UG.pdf
Core3DES_eval/sim/
Core3DES_eval/sim/mti_full/
Core3DES_eval/sim/mti_full/user/
Core3DES_eval/sim/mti_full/user/compvhdl.do
Core3DES_eval/sim/mti_full/user/compvlog.do
Core3DES_eval/sim/mti_full/user/core3des_lib/
Core3DES_eval/sim/mti_full/user/core3des_lib/core3des_pkg/
Core3DES_eval/sim/mti_full/user/core3des_lib/core3des_pkg/body.asm
Core3DES_eval/sim/mti_full/user/core3des_lib/core3des_pkg/body.dat
Core3DES_eval/sim/mti_full/user/core3des_lib/core3des_pkg/_primary.dat
Core3DES_eval/sim/mti_full/user/core3des_lib/core3des_pkg/_vhdl.asm
Core3DES_eval/sim/mti_full/user/core3des_lib/_info
Core3DES_eval/sim/mti_full/user/refreshvhdl.do
Core3DES_eval/sim/mti_full/user/refreshvlog.do
Core3DES_eval/sim/mti_full/user/runvhdl.do
Core3DES_eval/sim/mti_full/user/runvlog.do
Core3DES_eval/sim/mti_full/user/wavetb.do
Core3DES_eval/sim/mti_full/user/work_vhdl/
Core3DES_eval/sim/mti_full/user/work_vhdl/core3des/
Core3DES_eval/sim/mti_full/user/work_vhdl/core3des/translated.asm
Core3DES_eval/sim/mti_full/user/work_vhdl/core3des/translated.dat
Core3DES_eval/sim/mti_full/user/work_vhdl/core3des/_primary.dat
Core3DES_eval/sim/mti_full/user/work_vhdl/des3misc/
Core3DES_eval/sim/mti_full/user/work_vhdl/des3misc/translated.asm
Core3DES_eval/sim/mti_full/user/work_vhdl/des3misc/translated.dat
Core3DES_eval/sim/mti_full/user/work_vhdl/des3misc/_primary.dat
Core3DES_eval/sim/mti_full/user/work_vhdl/desmain/
Core3DES_eval/sim/mti_full/user/work_vhdl/desmain/translated.asm
Core3DES_eval/sim/mti_full/user/work_vhdl/desmain/translated.dat
Core3DES_eval/sim/mti_full/user/work_vhdl/desmain/_primary.dat
Core3DES_eval/sim/mti_full/user/work_vhdl/dsched/
Core3DES_eval/sim/mti_full/user/work_vhdl/dsched/translated.asm
Core3DES_eval/sim/mti_full/user/work_vhdl/dsched/translated.dat
Core3DES_eval/sim/mti_full/user/work_vhdl/dsched/_primary.dat
Core3DES_eval/sim/mti_full/user/work_vhdl/icnt/
Core3DES_eval/sim/mti_full/user/work_vhdl/icnt/translated.asm
Core3DES_eval/sim/mti_full/user/work_vhdl/icnt/translated.dat
Core3DES_eval/sim/mti_full/user/work_vhdl/icnt/_primary.dat
Core3DES_eval/sim/mti_full/user/work_vhdl/ksched/
Core3DES_eval/sim/mti_full/user/work_vhdl/ksched/translated.asm
Core3DES_eval/sim/mti_full/user/work_vhdl/ksched/translated.dat
Core3DES_eval/sim/mti_full/user/work_vhdl/ksched/_primary.dat
Core3DES_eval/sim/mti_full/user/work_vhdl/lxf/
Core3DES_eval/sim/mti_full/user/work_vhdl/lxf/translated.asm
Core3DES_eval/sim/mti_full/user/work_vhdl/lxf/translated.dat
Core3DES_eval/sim/mti_full/user/work_vhdl/lxf/_primary.dat
Core3DES_eval/sim/mti_full/user/work_vhdl/parcheck/
Core3DES_eval/sim/mti_full/user/work_vhdl/parcheck/translated.asm
Core3DES_eval/sim/mti_full/user/work_vhdl/parcheck/translated.dat
Core3DES_eval/sim/mti_full/user/work_vhdl/parcheck/_primary.dat
Core3DES_eval/sim/mti_full/user/work_vhdl/r2exk/
Core3DES_eval/sim/mti_full/user/work_vhdl/r2exk/translated.asm
Core3DES_eval/sim/mti_full/user/work_vhdl/r2exk/translated.dat
Core3DES_eval/sim/mti_full/user/work_vhdl/r2exk/_primary.dat
Core3DES_eval/sim/mti_full/user/work_vhdl/s2p/
Core3DES_eval/sim/mti_full/user/work_vhdl/s2p/translated.asm
Core3DES_eval/sim/mti_full/user/work_vhdl/s2p/translated.dat
Core3DES_eval/sim/mti_full/user/work_vhdl/s2p/_primary.dat
Core3DES_eval/sim/mti_full/user/work_vhdl/tb_vhdl/
Core3DES_eval/sim/mti_full/user/work_vhdl/tb_vhdl/behv.asm
Core3DES_eval/sim/mti_full/user/work_vhdl/tb_vhdl/behv.dat
Core3DES_eval/sim/mti_full/user/work_vhdl/tb_vhdl/_primary.dat
Core3DES_eval/sim/mti_full/user/work_vhdl/user_core3des/
Core3DES_eval/sim/mti_full/user/work_vhdl/user_core3des/translated.asm
Core3DES_eval/sim/mti_full/user/work_vhdl/user_core3des/translated.dat
Core3DES_eval/sim/mti_full/user/work_vhdl/user_core3des/_primary.dat
Core3DES_eval/sim/mti_full/user/work_vhdl/_info
Core3DES_eval/sim/mti_full/user/work_vlog/
Core3DES_eval/sim/mti_full/user/work_vlog/@c@o@r@e3@d@e@s/
Core3DES_eval/sim/mti_full/user/work_vlog/@c@o@r@e3@d@e@s/verilog.asm
Core3DES_eval/sim/mti_full/user/work_vlog/@c@o@r@e3@d@e@s/_primary.dat
Core3DES_eval/sim/mti_full/user/work_vlog/@c@o@r@e3@d@e@s/_primary.vhd
Core3DES_eval/sim/mti_full/user/work_vlog/@d@e@s3@m@i@s@c/
Core3DES_eval/sim/mti_full/user/work_vlog/@d@e@s3@m@i@s@c/verilog.asm
Core3DES_eval/sim/mti_full/user/work_vlog/@d@e@s3@m@i@s@c/_primary.dat
Core3DES_eval/sim/mti_full/user/work_vlog/@d@e@s@m@a@i@n/
Core3DES_eval/sim/mti_full/user/work_vlog/@d@e@s@m@a@i@n/verilog.asm
Core3DES_eval/sim/mti_full/user/work_vlog/@d@e@s@m@a@i@n/_primary.dat
Core3DES_eval/sim/mti_full/user/work_vlog/@d@s@c@h@e@d/
Core3DES_eval/sim/mti_full/user/work_vlog/@d@s@c@h@e@d/verilog.asm
Core3DES_eval/sim/mti_full/user/work_vlog/@d@s@c@h@e@d/_primary.dat
Core3DES_eval/sim/mti_full/user/work_vlog/@i@c@n@t/
Core3DES_eval/sim/mti_full/user/work_vlog/@i@c@n@t/verilog.asm
Core3DES_eval/sim/mti_full/user/work_vlog/@i@c@n@t/_primary.dat
Core3DES_eval/sim/mti

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