利用verilog语言，从上至下层次管理的设计思想；Verilog HDL的行为描述和结构描述,实现8位频率计，4个0检测修正电路的原理说明-The use of Verilog language, top-down hierarchical management design idea　Verilog HDL descr iption of the behavior and structure of a descr iption of the realization of frequency meter 8, 4 0 detection circuit principle of the amendment note