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文件名称:VHDL_Development_Board_Sources

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    2012-11-16
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    4.49mb
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CPLD开发板VHDL源程序并附上开发板的原理图-CPLD development board VHDL source code along with the development board schematics
(系统自动生成,下载前可以参看下载内容)

下载文件列表

VHDL_Development_Board_Sources/Mars-7128-S CPLD开发板用户手册.pdf
VHDL_Development_Board_Sources/使用说明请参看右侧注释====〉〉.txt
VHDL_Development_Board_Sources/综合实验/数字时钟/clock.asm.rpt
VHDL_Development_Board_Sources/综合实验/数字时钟/clock.bdf
VHDL_Development_Board_Sources/综合实验/数字时钟/clock.cdf
VHDL_Development_Board_Sources/综合实验/数字时钟/clock.done
VHDL_Development_Board_Sources/综合实验/数字时钟/clock.fit.eqn
VHDL_Development_Board_Sources/综合实验/数字时钟/clock.fit.rpt
VHDL_Development_Board_Sources/综合实验/数字时钟/clock.fit.summary
VHDL_Development_Board_Sources/综合实验/数字时钟/clock.flow.rpt
VHDL_Development_Board_Sources/综合实验/数字时钟/clock.map.eqn
VHDL_Development_Board_Sources/综合实验/数字时钟/clock.map.rpt
VHDL_Development_Board_Sources/综合实验/数字时钟/clock.map.summary
VHDL_Development_Board_Sources/综合实验/数字时钟/clock.pin
VHDL_Development_Board_Sources/综合实验/数字时钟/clock.pof
VHDL_Development_Board_Sources/综合实验/数字时钟/clock.qpf
VHDL_Development_Board_Sources/综合实验/数字时钟/clock.qsf
VHDL_Development_Board_Sources/综合实验/数字时钟/clock.qws
VHDL_Development_Board_Sources/综合实验/数字时钟/clock.tan.rpt
VHDL_Development_Board_Sources/综合实验/数字时钟/clock.tan.summary
VHDL_Development_Board_Sources/综合实验/数字时钟/clock_assignment_defaults.qdf
VHDL_Development_Board_Sources/综合实验/数字时钟/cmp_state.ini
VHDL_Development_Board_Sources/综合实验/数字时钟/decode47.bsf
VHDL_Development_Board_Sources/综合实验/数字时钟/decode47.vhd
VHDL_Development_Board_Sources/综合实验/数字时钟/fen1.bsf
VHDL_Development_Board_Sources/综合实验/数字时钟/fen1.vhd
VHDL_Development_Board_Sources/综合实验/数字时钟/fen100.bsf
VHDL_Development_Board_Sources/综合实验/数字时钟/fen100.vhd
VHDL_Development_Board_Sources/综合实验/数字时钟/fen24.bsf
VHDL_Development_Board_Sources/综合实验/数字时钟/fen24.vhd
VHDL_Development_Board_Sources/综合实验/数字时钟/fen60.bsf
VHDL_Development_Board_Sources/综合实验/数字时钟/fen60.vhd
VHDL_Development_Board_Sources/综合实验/数字时钟/lpm_counter0.bsf
VHDL_Development_Board_Sources/综合实验/数字时钟/lpm_counter0.cmp
VHDL_Development_Board_Sources/综合实验/数字时钟/lpm_counter0.vhd
VHDL_Development_Board_Sources/综合实验/数字时钟/lpm_counter0_wave0.jpg
VHDL_Development_Board_Sources/综合实验/数字时钟/lpm_counter0_waveforms.html
VHDL_Development_Board_Sources/综合实验/数字时钟/sel.bsf
VHDL_Development_Board_Sources/综合实验/数字时钟/sel.vhd
VHDL_Development_Board_Sources/综合实验/数字时钟/serv_req_info.txt
VHDL_Development_Board_Sources/综合实验/数字时钟/talkback/clock.asm.talkback.xml
VHDL_Development_Board_Sources/综合实验/数字时钟/talkback/clock.fit.talkback.xml
VHDL_Development_Board_Sources/综合实验/数字时钟/talkback/clock.map.talkback.xml
VHDL_Development_Board_Sources/综合实验/数字时钟/talkback/clock.rpp.talkback.xml
VHDL_Development_Board_Sources/综合实验/数字时钟/talkback/clock.tan.talkback.xml
VHDL_Development_Board_Sources/综合实验/数字时钟/db/add_sub_0eh.tdf
VHDL_Development_Board_Sources/综合实验/数字时钟/db/add_sub_9ph.tdf
VHDL_Development_Board_Sources/综合实验/数字时钟/db/add_sub_aph.tdf
VHDL_Development_Board_Sources/综合实验/数字时钟/db/add_sub_bph.tdf
VHDL_Development_Board_Sources/综合实验/数字时钟/db/add_sub_vdh.tdf
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock(0).cnf.cdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock(0).cnf.hdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock(1).cnf.cdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock(1).cnf.hdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock(10).cnf.cdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock(10).cnf.hdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock(2).cnf.cdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock(2).cnf.hdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock(3).cnf.cdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock(3).cnf.hdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock(4).cnf.cdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock(4).cnf.hdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock(5).cnf.cdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock(5).cnf.hdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock(6).cnf.cdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock(6).cnf.hdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock(7).cnf.cdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock(7).cnf.hdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock(8).cnf.cdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock(8).cnf.hdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock(9).cnf.cdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock(9).cnf.hdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock.(0).cnf.cdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock.(0).cnf.hdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock.(1).cnf.cdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock.(1).cnf.hdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock.(10).cnf.cdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock.(10).cnf.hdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock.(11).cnf.cdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock.(11).cnf.hdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock.(12).cnf.cdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock.(12).cnf.hdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock.(13).cnf.cdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock.(13).cnf.hdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock.(14).cnf.cdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db/clock.(14).cnf.hdb
VHDL_Development_Board_Sources/综合实验/数字时钟/db

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