文件名称:lpl
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- 上传时间:2012-11-16
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文件大小:2.66mb
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用于数字下变频器的 FPGA 实现 -Digital Down Converter for the FPGA to achieve
(系统自动生成,下载前可以参看下载内容)
下载文件列表
lpl/ddc.m
lpl/recv_tb.vhd
lpl/The MathWorks Deutschland - Filter Design Toolbox - Implementing the Filter Chain of a Digital Down-Converter in HDL Demo.htm
lpl/第十讲 数字下变频器的FPGA设计实现.ppt
lpl/ddc.asv
lpl/hs_err_pid3844.log
lpl/hs_err_pid1492.log
lpl/transcript
lpl/hs_err_pid3008.log
lpl/project_UHF_ddc/project_UHF_ddc/UHF_ddc.ngr
lpl/project_UHF_ddc/project_UHF_ddc/UHF_ddc.ngc
lpl/project_UHF_ddc/project_UHF_ddc/UHF_ddc.stx
lpl/project_UHF_ddc/project_UHF_ddc/project_UHF_ddc.ise
lpl/project_UHF_ddc/project_UHF_ddc/UHF_ddc_tb.vhd
lpl/project_UHF_ddc/project_UHF_ddc/pepExtractor.prj
lpl/project_UHF_ddc/project_UHF_ddc/UHF_ddc_tb_vhd.udo
lpl/project_UHF_ddc/project_UHF_ddc/UHF_ddc_tb_vhd.fdo
lpl/project_UHF_ddc/project_UHF_ddc/transcript
lpl/project_UHF_ddc/project_UHF_ddc
lpl/project_UHF_ddc
lpl
lpl/recv_tb.vhd
lpl/The MathWorks Deutschland - Filter Design Toolbox - Implementing the Filter Chain of a Digital Down-Converter in HDL Demo.htm
lpl/第十讲 数字下变频器的FPGA设计实现.ppt
lpl/ddc.asv
lpl/hs_err_pid3844.log
lpl/hs_err_pid1492.log
lpl/transcript
lpl/hs_err_pid3008.log
lpl/project_UHF_ddc/project_UHF_ddc/UHF_ddc.ngr
lpl/project_UHF_ddc/project_UHF_ddc/UHF_ddc.ngc
lpl/project_UHF_ddc/project_UHF_ddc/UHF_ddc.stx
lpl/project_UHF_ddc/project_UHF_ddc/project_UHF_ddc.ise
lpl/project_UHF_ddc/project_UHF_ddc/UHF_ddc_tb.vhd
lpl/project_UHF_ddc/project_UHF_ddc/pepExtractor.prj
lpl/project_UHF_ddc/project_UHF_ddc/UHF_ddc_tb_vhd.udo
lpl/project_UHF_ddc/project_UHF_ddc/UHF_ddc_tb_vhd.fdo
lpl/project_UHF_ddc/project_UHF_ddc/transcript
lpl/project_UHF_ddc/project_UHF_ddc
lpl/project_UHF_ddc
lpl
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