文件名称:ref-sdr-sdram-vhdl
-
所属分类:
- 标签属性:
- 上传时间:2012-11-16
-
文件大小:990.71kb
-
已下载:1次
-
提 供 者:
-
相关连接:无下载说明:别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容来自于网络,使用问题请自行百度
基于VHDL编写的SDR-SDRAM控制器的编程,目前是业界常用的RAM控制器-VHDL prepared based on the SDR-SDRAM controller programming, is now commonly used in industry RAM controller
(系统自动生成,下载前可以参看下载内容)
下载文件列表
doc/
doc/readme.txt
doc/sdr_sdram.pdf
model/
model/io_utils.vhd
model/mt48lc8m16a2.vhd
model/mt48lc8m16a2.zip
model/mti_pkg.vhd
model/stdlogar.vhd
model/util1164.vhd
route/
route/pll1.vhd
route/sdr_sdram.csf
route/sdr_sdram.esf
route/sdr_sdram.vqm
simulation/
simulation/APEX20KE_MF.VHD
simulation/io_utils.vhd
simulation/lpm_pack.vhd
simulation/modelsim.ini
simulation/mt48lc8m16a2.vhd
simulation/mti_pkg.vhd
simulation/readme.txt
simulation/sdr_sdram_tb.vhd
simulation/stdlogar.vhd
simulation/util1164.vhd
simulation/work/
simulation/work/altcam/
simulation/work/altcam/behave.dat
simulation/work/altcam/behave.psm
simulation/work/altcam/_primary.dat
simulation/work/altclklock/
simulation/work/altclklock/behavior.dat
simulation/work/altclklock/behavior.psm
simulation/work/altclklock/_primary.dat
simulation/work/altlvds_rx/
simulation/work/altlvds_rx/behavior.dat
simulation/work/altlvds_rx/behavior.psm
simulation/work/altlvds_rx/_primary.dat
simulation/work/altlvds_tx/
simulation/work/altlvds_tx/behavior.dat
simulation/work/altlvds_tx/behavior.psm
simulation/work/altlvds_tx/_primary.dat
simulation/work/command/
simulation/work/command/rtl.dat
simulation/work/command/rtl.psm
simulation/work/command/_primary.dat
simulation/work/control_interface/
simulation/work/control_interface/rtl.dat
simulation/work/control_interface/rtl.psm
simulation/work/control_interface/_primary.dat
simulation/work/io_utils/
simulation/work/io_utils/body.dat
simulation/work/io_utils/body.psm
simulation/work/io_utils/_primary.dat
simulation/work/io_utils/_vhdl.psm
simulation/work/mt48lc8m16a2/
simulation/work/mt48lc8m16a2/behave.dat
simulation/work/mt48lc8m16a2/behave.psm
simulation/work/mt48lc8m16a2/_primary.dat
simulation/work/mti_pkg/
simulation/work/mti_pkg/body.dat
simulation/work/mti_pkg/body.psm
simulation/work/mti_pkg/_primary.dat
simulation/work/mti_pkg/_vhdl.psm
simulation/work/pll1/
simulation/work/pll1/syn.dat
simulation/work/pll1/syn.psm
simulation/work/pll1/_primary.dat
simulation/work/sdr_data_path/
simulation/work/sdr_data_path/rtl.dat
simulation/work/sdr_data_path/rtl.psm
simulation/work/sdr_data_path/_primary.dat
simulation/work/sdr_sdram/
simulation/work/sdr_sdram/rtl.dat
simulation/work/sdr_sdram/rtl.psm
simulation/work/sdr_sdram/_primary.dat
simulation/work/sdr_sdram_tb/
simulation/work/sdr_sdram_tb/rtl.dat
simulation/work/sdr_sdram_tb/rtl.psm
simulation/work/sdr_sdram_tb/_primary.dat
simulation/work/std_logic_arith/
simulation/work/std_logic_arith/body.dat
simulation/work/std_logic_arith/body.psm
simulation/work/std_logic_arith/_primary.dat
simulation/work/std_logic_arith/_vhdl.psm
simulation/work/util_1164/
simulation/work/util_1164/body.dat
simulation/work/util_1164/body.psm
simulation/work/util_1164/_primary.dat
simulation/work/util_1164/_vhdl.psm
simulation/work/_info
source/
source/Command.vhd
source/control_interface.vhd
source/pll1.vhd
source/sdr_data_path.vhd
source/sdr_sdram.vhd
synthesis/
synthesis/synplicity/
synthesis/synplicity/readme.txt
synthesis/synplicity/sdr_sdram.prj
synthesis/synplicity/sdr_sdram.vqm
doc/readme.txt
doc/sdr_sdram.pdf
model/
model/io_utils.vhd
model/mt48lc8m16a2.vhd
model/mt48lc8m16a2.zip
model/mti_pkg.vhd
model/stdlogar.vhd
model/util1164.vhd
route/
route/pll1.vhd
route/sdr_sdram.csf
route/sdr_sdram.esf
route/sdr_sdram.vqm
simulation/
simulation/APEX20KE_MF.VHD
simulation/io_utils.vhd
simulation/lpm_pack.vhd
simulation/modelsim.ini
simulation/mt48lc8m16a2.vhd
simulation/mti_pkg.vhd
simulation/readme.txt
simulation/sdr_sdram_tb.vhd
simulation/stdlogar.vhd
simulation/util1164.vhd
simulation/work/
simulation/work/altcam/
simulation/work/altcam/behave.dat
simulation/work/altcam/behave.psm
simulation/work/altcam/_primary.dat
simulation/work/altclklock/
simulation/work/altclklock/behavior.dat
simulation/work/altclklock/behavior.psm
simulation/work/altclklock/_primary.dat
simulation/work/altlvds_rx/
simulation/work/altlvds_rx/behavior.dat
simulation/work/altlvds_rx/behavior.psm
simulation/work/altlvds_rx/_primary.dat
simulation/work/altlvds_tx/
simulation/work/altlvds_tx/behavior.dat
simulation/work/altlvds_tx/behavior.psm
simulation/work/altlvds_tx/_primary.dat
simulation/work/command/
simulation/work/command/rtl.dat
simulation/work/command/rtl.psm
simulation/work/command/_primary.dat
simulation/work/control_interface/
simulation/work/control_interface/rtl.dat
simulation/work/control_interface/rtl.psm
simulation/work/control_interface/_primary.dat
simulation/work/io_utils/
simulation/work/io_utils/body.dat
simulation/work/io_utils/body.psm
simulation/work/io_utils/_primary.dat
simulation/work/io_utils/_vhdl.psm
simulation/work/mt48lc8m16a2/
simulation/work/mt48lc8m16a2/behave.dat
simulation/work/mt48lc8m16a2/behave.psm
simulation/work/mt48lc8m16a2/_primary.dat
simulation/work/mti_pkg/
simulation/work/mti_pkg/body.dat
simulation/work/mti_pkg/body.psm
simulation/work/mti_pkg/_primary.dat
simulation/work/mti_pkg/_vhdl.psm
simulation/work/pll1/
simulation/work/pll1/syn.dat
simulation/work/pll1/syn.psm
simulation/work/pll1/_primary.dat
simulation/work/sdr_data_path/
simulation/work/sdr_data_path/rtl.dat
simulation/work/sdr_data_path/rtl.psm
simulation/work/sdr_data_path/_primary.dat
simulation/work/sdr_sdram/
simulation/work/sdr_sdram/rtl.dat
simulation/work/sdr_sdram/rtl.psm
simulation/work/sdr_sdram/_primary.dat
simulation/work/sdr_sdram_tb/
simulation/work/sdr_sdram_tb/rtl.dat
simulation/work/sdr_sdram_tb/rtl.psm
simulation/work/sdr_sdram_tb/_primary.dat
simulation/work/std_logic_arith/
simulation/work/std_logic_arith/body.dat
simulation/work/std_logic_arith/body.psm
simulation/work/std_logic_arith/_primary.dat
simulation/work/std_logic_arith/_vhdl.psm
simulation/work/util_1164/
simulation/work/util_1164/body.dat
simulation/work/util_1164/body.psm
simulation/work/util_1164/_primary.dat
simulation/work/util_1164/_vhdl.psm
simulation/work/_info
source/
source/Command.vhd
source/control_interface.vhd
source/pll1.vhd
source/sdr_data_path.vhd
source/sdr_sdram.vhd
synthesis/
synthesis/synplicity/
synthesis/synplicity/readme.txt
synthesis/synplicity/sdr_sdram.prj
synthesis/synplicity/sdr_sdram.vqm
本网站为编程资源及源代码搜集、介绍的搜索网站,版权归原作者所有! 粤ICP备11031372号
1999-2046 搜珍网 All Rights Reserved.