文件名称:Xilinx_9
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Xilinx ISE
官方源代码盘第九章-Xilinx ISE official source was the ninth chapter
官方源代码盘第九章-Xilinx ISE official source was the ninth chapter
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下载文件列表
Xilinx_9
Xilinx_9/Example-9-1
Xilinx_9/Example-9-1/synplify_pro_prj
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码
Xilinx_9/Example-9-1/watch_sc_v5
Xilinx_9/Example-9-1/watch_sc_v5/xst
Xilinx_9/Example-9-1/watch_sc_v5/xst/work
Xilinx_9/Example-9-1/watch_sc_v5/xst/work/sub00
Xilinx_9/Example-9-1/watch_sc_v5/_ngo
Xilinx_9/Example-9-1/watch_sc_v5/_tmp_
Xilinx_9/Example-9-1/watch_sc_v5/_tmp_/coretmpdir
Xilinx_9/Example-9-1/watch_sc_v5/__projnav
Xilinx_9/Example-9-1/watch_sc_v6
Xilinx_9/Example-9-1/watch_sc_v6/xst
Xilinx_9/Example-9-1/watch_sc_v6/xst/work
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/sub00
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg1D
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg1E
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg20
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg37
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg41
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg51
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg66
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg71
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg7B
Xilinx_9/Example-9-1/watch_sc_v6/_ngo
Xilinx_9/Example-9-1/watch_sc_v6/__projnav
Xilinx_9/Example-9-1/源文件
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/black_box.v
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/cnt60.vf
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/dcm1.v
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/decode.v
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/hex2led.v
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/outs3.vf
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/STMACH_V.v
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/stopwatch.vf
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/STMACH_V.plg
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/STMACH_V.srd
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.edf
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.fse
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.ncf
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.plg
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.srd
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.srm
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.srr
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.srs
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.tlg
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.edf
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.fse
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.ncf
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.plg
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.srd
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.srm
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.srr
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.srs
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.tlg
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Syn_Pro_stopwatch.prd
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Syn_Pro_stopwatch.prj
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Syn_Pro_stopwatch.sdc
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/tenths.v
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/virtex2p.v
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/black_box.v
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/cnt60.vf
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/dcm1.v
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/decode.v
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/hex2led.v
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/outs3.vf
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/STMACH_V.v
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/stopwatch.vf
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/tenths.v
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/virtex2p.v
Xilinx_9/Example-9-1/watch_sc_v5/.untf
Xilinx_9/Example-9-1/watch_sc_v5/AndNor2.sch
Xilinx_9/Example-9-1/watch_sc_v5/automake.log
Xilinx_9/Example-9-1/watch_sc_v5/bitgen.ut
Xilinx_9/Example-9-1/watch_sc_v5/cnt60.cmd_log
Xilinx_9/Example-9-1/watch_sc_v5/cnt60.jhd
Xilinx_9/Example-9-1/watch_sc_v5/cnt60.sch
Xilinx_9/Example-9-1/watch_sc_v5/cnt60.sym
Xilinx_9/Example-9-1/watch_sc_v5/cnt60.vhf
Xilinx_9/Example-9-1/watch_sc_v5/core.tpl
Xilinx_9/Example-9-1/watch_sc_v5/coregen.log
Xilinx_9/Example-9-1/watch_sc_v5/DCM1.jhd
Xilinx_9/Example-9-1/watch_sc_v5/dcm1.sym
Xilinx_9/Example-9-1/watch_sc_v5/DCM1.vhd
Xilinx_9/Example-9-1/watch_sc_v5/DCM1.xaw
Xilinx_9/Example-9-1/watch_sc_v5/DCM1_arwz.ucf
Xilinx_9/Example-9-1/watch_sc_v5/decode.jhd
Xilinx_9/Example-9-1/watch_sc_v5/decode.spl
Xilinx_9/Example-9-1/watch_sc_v5/decode
Xilinx_9/Example-9-1
Xilinx_9/Example-9-1/synplify_pro_prj
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码
Xilinx_9/Example-9-1/watch_sc_v5
Xilinx_9/Example-9-1/watch_sc_v5/xst
Xilinx_9/Example-9-1/watch_sc_v5/xst/work
Xilinx_9/Example-9-1/watch_sc_v5/xst/work/sub00
Xilinx_9/Example-9-1/watch_sc_v5/_ngo
Xilinx_9/Example-9-1/watch_sc_v5/_tmp_
Xilinx_9/Example-9-1/watch_sc_v5/_tmp_/coretmpdir
Xilinx_9/Example-9-1/watch_sc_v5/__projnav
Xilinx_9/Example-9-1/watch_sc_v6
Xilinx_9/Example-9-1/watch_sc_v6/xst
Xilinx_9/Example-9-1/watch_sc_v6/xst/work
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/sub00
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg1D
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg1E
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg20
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg37
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg41
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg51
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg66
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg71
Xilinx_9/Example-9-1/watch_sc_v6/xst/work/vlg7B
Xilinx_9/Example-9-1/watch_sc_v6/_ngo
Xilinx_9/Example-9-1/watch_sc_v6/__projnav
Xilinx_9/Example-9-1/源文件
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/black_box.v
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/cnt60.vf
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/dcm1.v
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/decode.v
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/hex2led.v
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/outs3.vf
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/STMACH_V.v
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/stopwatch.vf
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/STMACH_V.plg
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/STMACH_V.srd
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.edf
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.fse
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.ncf
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.plg
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.srd
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.srm
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.srr
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.srs
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn/stopwatch.tlg
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.edf
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.fse
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.ncf
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.plg
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.srd
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.srm
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.srr
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.srs
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Synplify_syn_1/stopwatch.tlg
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Syn_Pro_stopwatch.prd
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Syn_Pro_stopwatch.prj
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/Syn_Pro_stopwatch.sdc
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/tenths.v
Xilinx_9/Example-9-1/synplify_pro_prj/Synplify_Pro/virtex2p.v
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/black_box.v
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/cnt60.vf
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/dcm1.v
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/decode.v
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/hex2led.v
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/outs3.vf
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/STMACH_V.v
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/stopwatch.vf
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/tenths.v
Xilinx_9/Example-9-1/synplify_pro_prj/综合所需的源代码/virtex2p.v
Xilinx_9/Example-9-1/watch_sc_v5/.untf
Xilinx_9/Example-9-1/watch_sc_v5/AndNor2.sch
Xilinx_9/Example-9-1/watch_sc_v5/automake.log
Xilinx_9/Example-9-1/watch_sc_v5/bitgen.ut
Xilinx_9/Example-9-1/watch_sc_v5/cnt60.cmd_log
Xilinx_9/Example-9-1/watch_sc_v5/cnt60.jhd
Xilinx_9/Example-9-1/watch_sc_v5/cnt60.sch
Xilinx_9/Example-9-1/watch_sc_v5/cnt60.sym
Xilinx_9/Example-9-1/watch_sc_v5/cnt60.vhf
Xilinx_9/Example-9-1/watch_sc_v5/core.tpl
Xilinx_9/Example-9-1/watch_sc_v5/coregen.log
Xilinx_9/Example-9-1/watch_sc_v5/DCM1.jhd
Xilinx_9/Example-9-1/watch_sc_v5/dcm1.sym
Xilinx_9/Example-9-1/watch_sc_v5/DCM1.vhd
Xilinx_9/Example-9-1/watch_sc_v5/DCM1.xaw
Xilinx_9/Example-9-1/watch_sc_v5/DCM1_arwz.ucf
Xilinx_9/Example-9-1/watch_sc_v5/decode.jhd
Xilinx_9/Example-9-1/watch_sc_v5/decode.spl
Xilinx_9/Example-9-1/watch_sc_v5/decode