文件名称:matlab_to_vhdlfpga
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- 上传时间:2012-11-16
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本文提出了加快发展之路
从理论设计,通过Matlab / Simulink环境
在定点算法对其行为模拟的
在FPGA或定制实现硅片。这个了
实现了netlist移植的Simulink系统
描述成的硬件描述语言[VHDL]。在这个例子中,这个
Simulink-to-VHDL转换器被设计来使用
代码来描述结构VHDL系统互连,
允许简单的行为说明基本模块。
结果VHDL bit-true交付后代码
比较定点Simulink仿真模型等效
模拟。-This paper presents the way of speeding up the route
from the theoretical design with Simulink/Matlab, via
behavioral simulation in fixed-point arithmetic to the
implementation on either FPGA or custom silicon. This has
been achieved by porting the netlist of the Simulink system
descr iption into the VHDL. At the first instance, the
Simulink-to-VHDL converter has been designed to use
structural VHDL code to describe system interconnections,
allowing simple behavioral descr iptions for basic blocks.
The resulting VHDL code delivers bit-true result when
compared to the equivalent fixed-point Simulink model
simulations.
从理论设计,通过Matlab / Simulink环境
在定点算法对其行为模拟的
在FPGA或定制实现硅片。这个了
实现了netlist移植的Simulink系统
描述成的硬件描述语言[VHDL]。在这个例子中,这个
Simulink-to-VHDL转换器被设计来使用
代码来描述结构VHDL系统互连,
允许简单的行为说明基本模块。
结果VHDL bit-true交付后代码
比较定点Simulink仿真模型等效
模拟。-This paper presents the way of speeding up the route
from the theoretical design with Simulink/Matlab, via
behavioral simulation in fixed-point arithmetic to the
implementation on either FPGA or custom silicon. This has
been achieved by porting the netlist of the Simulink system
descr iption into the VHDL. At the first instance, the
Simulink-to-VHDL converter has been designed to use
structural VHDL code to describe system interconnections,
allowing simple behavioral descr iptions for basic blocks.
The resulting VHDL code delivers bit-true result when
compared to the equivalent fixed-point Simulink model
simulations.
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