文件名称:clk
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- 上传时间:2012-11-16
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文件大小:29.36kb
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通过一个主时钟信号完成异步FIFO读写时钟信号的产生。编译通过实现功能。-Through a master clock signal the completion of asynchronous FIFO read and write clock signal generation. Compiler through the implementation function.
相关搜索: 异步FIFO
异步fifo vhdl
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下载文件列表
clk/__projnav/clk.gfl
clk/__projnav/sumrpt_tcl.rsp
clk/__projnav/runXst_tcl.rsp
clk/__projnav/clk_flowplus.gfl
clk/__projnav/clkdiv.xst
clk/clk.ise
clk/clk.dhp
clk/clk_tb.jhd
clk/clk.ise_ISE_Backup
clk/clk_tb_bencher.prj
clk/clk_tb.vhw
clk/clk_tb.ant
clk/clk.vhd
clk/test_tb_bencher.prj
clk/pepExtractor.prj
clk/clk_tb.xwv_bak
clk/__projnav.log
clk/automake.log
clk/clk_tb.udo
clk/clk_tb.fdo
clk/transcript
clk/work/_info
clk/work/clk/_primary.dat
clk/work/clk/behavioral.dat
clk/work/clk/behavioral.asm
clk/work/clk_tb/_primary.dat
clk/work/clk_tb/testbench_arch.dat
clk/work/clk_tb/testbench_arch.asm
clk/work/clkdiv/_primary.dat
clk/work/clkdiv/behavioral.dat
clk/work/clkdiv/behavioral.asm
clk/clk_tb.tbw
clk/vsim.wlf
clk/results.txt
clk/clkdiv_summary.html
clk/clk_tb.xwv
clk/clkdiv.prj
clk/clkdiv.cmd_log
clk/clkdiv.syr
clk/clkdiv.lso
clk/xst/work/sub00/vhpl00.vho
clk/xst/work/sub00/vhpl01.vho
clk/xst/work/hdllib.ref
clk/xst/work/hdpdeps.ref
clk/clkdiv.ngr
clk/clkdiv.stx
clk/xst/dump.xst/clkdiv.prj/ngx/opt
clk/xst/dump.xst/clkdiv.prj/ngx/notopt
clk/xst/dump.xst/clkdiv.prj/ngx
clk/xst/work/sub00
clk/xst/dump.xst/clkdiv.prj
clk/work/clk
clk/work/clk_tb
clk/work/clkdiv
clk/xst/work
clk/xst/dump.xst
clk/_xmsgs
clk/__projnav
clk/work
clk/xst
clk
clk/__projnav/sumrpt_tcl.rsp
clk/__projnav/runXst_tcl.rsp
clk/__projnav/clk_flowplus.gfl
clk/__projnav/clkdiv.xst
clk/clk.ise
clk/clk.dhp
clk/clk_tb.jhd
clk/clk.ise_ISE_Backup
clk/clk_tb_bencher.prj
clk/clk_tb.vhw
clk/clk_tb.ant
clk/clk.vhd
clk/test_tb_bencher.prj
clk/pepExtractor.prj
clk/clk_tb.xwv_bak
clk/__projnav.log
clk/automake.log
clk/clk_tb.udo
clk/clk_tb.fdo
clk/transcript
clk/work/_info
clk/work/clk/_primary.dat
clk/work/clk/behavioral.dat
clk/work/clk/behavioral.asm
clk/work/clk_tb/_primary.dat
clk/work/clk_tb/testbench_arch.dat
clk/work/clk_tb/testbench_arch.asm
clk/work/clkdiv/_primary.dat
clk/work/clkdiv/behavioral.dat
clk/work/clkdiv/behavioral.asm
clk/clk_tb.tbw
clk/vsim.wlf
clk/results.txt
clk/clkdiv_summary.html
clk/clk_tb.xwv
clk/clkdiv.prj
clk/clkdiv.cmd_log
clk/clkdiv.syr
clk/clkdiv.lso
clk/xst/work/sub00/vhpl00.vho
clk/xst/work/sub00/vhpl01.vho
clk/xst/work/hdllib.ref
clk/xst/work/hdpdeps.ref
clk/clkdiv.ngr
clk/clkdiv.stx
clk/xst/dump.xst/clkdiv.prj/ngx/opt
clk/xst/dump.xst/clkdiv.prj/ngx/notopt
clk/xst/dump.xst/clkdiv.prj/ngx
clk/xst/work/sub00
clk/xst/dump.xst/clkdiv.prj
clk/work/clk
clk/work/clk_tb
clk/work/clkdiv
clk/xst/work
clk/xst/dump.xst
clk/_xmsgs
clk/__projnav
clk/work
clk/xst
clk
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