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文件名称:FPGA_AM

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  • 上传时间:
    2012-11-16
  • 文件大小:
    626.96kb
  • 已下载:
    0次
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  • 下载说明:
    别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容来自于网络,使用问题请自行百度

基于cyclone系列FPGA的模拟幅度调制的VHDL代码-Cyclone series FPGA-based simulation of VHDL code amplitude modulation
(系统自动生成,下载前可以参看下载内容)

下载文件列表

AM/project/BU_MA.vhd.bak
AM/project/FPGA_AM.qpf
AM/project/FPGA_AM.qsf
AM/project/BU_MA.vhd
AM/project/FPGA_AM.dpf
AM/project/CON_256.vhd
AM/project/FI_OUT.vhd
AM/project/lAM_FUDU_waveforms.html
AM/project/lAM_FUDU_wave0.jpg
AM/project/ADD256_waveforms.html
AM/project/CON_256.cmp
AM/project/lADD00_waveforms.html
AM/project/lADD00_wave0.jpg
AM/project/lAM_FUDU.vhd
AM/project/lADD00.vhd
AM/project/CON_256.bsf
AM/project/CARRIER_ROM_waveforms.html
AM/project/lADD00.cmp
AM/project/lADD00.bsf
AM/project/lAM_FUDU.cmp
AM/project/ADD256.vhd
AM/project/FPGA_AM.map.rpt
AM/project/lAM_FUDU.bsf
AM/project/CARRIER.vhd.bak
AM/project/MODEM.bsf
AM/project/FPGA_AM.cdf
AM/project/CARRIER_ROM.bsf
AM/project/CARRIER_ROM.cmp
AM/project/CARRIER_ROM.vhd
AM/project/CARRIER_ROM_wave0.jpg
AM/project/lFINALL_OUT_waveforms.html
AM/project/ADD256.cmp
AM/project/FPGA_AM.map.summary
AM/project/lFINALL_OUT_wave0.jpg
AM/project/FPGA_AM.flow.rpt
AM/project/lFINALL_OUT.vhd
AM/project/lFINALL_OUT.cmp
AM/project/lFINALL_OUT.bsf
AM/project/FPGA_AM.fit.rpt
AM/project/FPGA_AM.asm.rpt
AM/project/FPGA_AM.tan.rpt
AM/project/FPGA_AM.done
AM/project/lFINALL_OUT.vhd.bak
AM/project/ADD256_wave0.jpg
AM/project/ADD256.bsf
AM/project/AM_MOD.vhd
AM/project/AM_MOD.cmp
AM/project/lAD256.vhd
AM/project/AM_MOD.bsf
AM/project/CARRIER.bsf
AM/project/TEST.bsf
AM/project/BU_MA.bsf
AM/project/lAD256.cmp
AM/project/lAD256.bsf
AM/project/FI_OUT.cmp
AM/project/FI_OUT.bsf
AM/project/FPGA_AM.pin
AM/project/FPGA_AM.fit.smsg
AM/project/FPGA_AM.fit.summary
AM/project/AM_MOD_waveforms.html
AM/project/AM_MOD_wave0.jpg
AM/project/FPGA_AM.sof
AM/project/FPGA_AM.pof
AM/project/FI_OUT_waveforms.html
AM/project/FI_OUT_wave0.jpg
AM/project/FPGA_AM.tan.summary
AM/project/CON_256.vhd.bak
AM/project/FI_OUT.vhd.bak
AM/project/lAD256.vhd.bak
AM/project/FPGA_AM.sim.rpt
AM/project/ROM_99.vhd
AM/project/rom99_waveforms.html
AM/project/rom99_wave0.jpg
AM/project/DOU_200M.ppf
AM/project/rom99.vhd
AM/project/rom99.cmp
AM/project/rom99.bsf
AM/project/CARRIER_507.bsf
AM/project/ROM_99_waveforms.html
AM/project/ROM_99_wave0.jpg
AM/project/DOU_200M.vhd
AM/project/ROM_99.cmp
AM/project/ROM_99.bsf
AM/project/ROM_99.vhd.bak
AM/project/DOU_200M_waveforms.html
AM/project/DOU_200M_wave0.jpg
AM/project/DOU_200M.cmp
AM/project/DOU_200M.bsf
AM/project/altpll0_200M_waveforms.html
AM/project/altpll0_200M_wave0.jpg
AM/project/lpm_rom0_394_wave0.jpg
AM/project/altpll0_200M.ppf
AM/project/altpll0_200M.vhd
AM/project/altpll0_200M.cmp
AM/project/altpll0_200M.bsf
AM/project/lpm_rom0_394_waveforms.html
AM/project/lpm_rom0_394.vhd
AM/project/lpm_rom0_394.cmp
AM/project/lpm_rom0_394.bsf
AM/project/FPGA_AM_assignment_defaults.qdf
AM/project/FPGA_AM.qws
AM/project/source/MODEM.vhd.bak
AM/project/source/MODEM.vhd
AM/project/source/SIN_ROM.mif
AM/project/source/FPGA_AM_rom.mif
AM/project/source/CARRIER.vhd.bak
AM/project/source/CARRIER.vhd
AM/project/source/CARRIER_KHZ507.vhd
AM/project/source/CARRIER_KHZ507.vhd.bak
AM/project/source/FPGA_AM_rom_98.mif
AM/project/source/FPGA_AM_394.mif
AM/project/source/FPGA_AM_TEST.bdf
AM/project/source/FPGA_AM.vwf
AM/project/source/test.vhd.bak
AM/project/source/test.vhd
AM/project/db/wed.wsf
AM/project/db/prev_cmp_FPGA_AM.map.qmsg
AM/project/db/prev_cmp_FPGA_AM.qmsg
AM/project/db/mult_4sm.tdf
AM/project/db/mult_6sm.tdf
AM/project/db/prev_cmp_FPGA_AM.fit.qmsg
AM/project/db/mult_1sm.tdf
AM/project/db/prev_cmp_FPGA_AM.asm.qmsg
AM/project/db/altsyncram_u981.tdf
AM/project/db/prev_cmp_FPGA_AM.tan.qmsg
AM/project/db/lpm_constant_jf6.tdf
AM/project/db/add_sub_vke.tdf
AM/project/db/add_sub_hsh.tdf
AM/project/db/lpm_constant_ih6.tdf
AM/project/db/prev_cmp_FPGA_AM.sim.qmsg
AM/project/db/FPGA_AM.sim_ori.vwf
AM/project/db/lpm_constant_li6.tdf
AM/project/db/lpm_constant_bh6.tdf
AM/project/db/add_sub_htg.tdf
AM/project/db/add_sub_f8h.tdf
AM/project/db/add_sub_uke.tdf
AM/project/db/lpm_constant_dh6.tdf
AM/project/db/add_sub_ahe.tdf
AM/project/db/add_sub_81f.tdf
AM/project/db/lpm_constant_ki6.tdf
AM/project/db/lpm_constant_pi6.tdf
AM/project/db/altsyncram_mu81.tdf
AM/project/db/lpm_constant_jh6.tdf
AM/project/db/altsyncram_2471.tdf
AM/project/db/lpm_constant_kf6.tdf
AM/project/db/altsyncram_it61.tdf
AM/project/db/lpm_rom0_394_altsyncram.v
AM/project/db/FPGA_AM.db_info
AM/project/db/FPGA_AM.sld_design_entry.sci
AM/project/db/FPGA_AM.eco.cdb
AM/注意事项和说明/注意事项和说明.doc
AM/project/source
AM/project/db
AM/project
AM/注意事项和说明
AM

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