uart_zhiwen/.lso
uart_zhiwen/baud_gen.prj
uart_zhiwen/baud_gen.stx
uart_zhiwen/baud_gen.v
uart_zhiwen/baud_gen.xst
uart_zhiwen/baud_gen_vhdl.prj
uart_zhiwen/uart_rx.prj
uart_zhiwen/uart_rx.stx
uart_zhiwen/uart_rx.v
uart_zhiwen/uart_rx.xst
uart_zhiwen/uart_rx_vhdl.prj
uart_zhiwen/uart_top.cmd_log
uart_zhiwen/uart_top.lso
uart_zhiwen/uart_top.prj
uart_zhiwen/uart_top.syr
uart_zhiwen/uart_top.v
uart_zhiwen/uart_top.xst
uart_zhiwen/uart_top_vhdl.prj
uart_zhiwen/uart_tx.prj
uart_zhiwen/uart_tx.stx
uart_zhiwen/uart_tx.v
uart_zhiwen/uart_tx.xst
uart_zhiwen/uart_tx_vhdl.prj
uart_zhiwen/uart_zhiwen.ise
uart_zhiwen/uart_zhiwen.ise_ISE_Backup
uart_zhiwen/xst/dump.xst/uart_top.prj/ngx/notopt
uart_zhiwen/xst/dump.xst/uart_top.prj/ngx/opt
uart_zhiwen/xst/dump.xst/uart_top.prj/ngx
uart_zhiwen/xst/dump.xst/uart_top.prj
uart_zhiwen/xst/dump.xst
uart_zhiwen/xst/projnav.tmp
uart_zhiwen/xst/work/hdllib.ref
uart_zhiwen/xst/work/vlg1A/uart__top.bin
uart_zhiwen/xst/work/vlg1A
uart_zhiwen/xst/work/vlg21/uart__rx.bin
uart_zhiwen/xst/work/vlg21
uart_zhiwen/xst/work/vlg2B/uart__tx.bin
uart_zhiwen/xst/work/vlg2B
uart_zhiwen/xst/work/vlg59/baud__gen.bin
uart_zhiwen/xst/work/vlg59
uart_zhiwen/xst/work
uart_zhiwen/xst
uart_zhiwen/_xmsgs/xst.xmsgs
uart_zhiwen/_xmsgs
uart_zhiwen