文件名称:uart16750_latest.tar
介绍说明--下载内容来自于网络,使用问题请自行百度
Implements a 16550/16750 UART core
(系统自动生成,下载前可以参看下载内容)
下载文件列表
./trunk/
./trunk/bench/
./trunk/bench/vhdl/
./trunk/bench/vhdl/txt_util.vhd
./trunk/bench/vhdl/uart_transactor.vhd
./trunk/bench/vhdl/slib_testbench.vhd
./trunk/bench/vhdl/uart_package.vhd
./trunk/rtl/
./trunk/rtl/vhdl/
./trunk/rtl/vhdl/uart_16750.vhd
./trunk/rtl/vhdl/slib_fifo.vhd
./trunk/rtl/vhdl/uart_transmitter.vhd
./trunk/rtl/vhdl/uart_baudgen.vhd
./trunk/rtl/vhdl/uart_interrupt.vhd
./trunk/rtl/vhdl/slib_mv_filter.vhd
./trunk/rtl/vhdl/slib_clock_div.vhd
./trunk/rtl/vhdl/slib_edge_detect.vhd
./trunk/rtl/vhdl/uart_receiver.vhd
./trunk/rtl/vhdl/slib_input_filter.vhd
./trunk/rtl/vhdl/slib_input_sync.vhd
./trunk/rtl/vhdl/slib_fifo_cyclone2.vhd
./trunk/rtl/vhdl/slib_counter.vhd
./trunk/syn/
./trunk/syn/Altera/
./trunk/syn/Altera/CycloneII/
./trunk/syn/Altera/CycloneII/UART16750.tan.rpt
./trunk/syn/Altera/CycloneII/UART16750.fit.rpt
./trunk/syn/Altera/CycloneII/UART16750.fit.smsg
./trunk/syn/Altera/CycloneII/UART16750.bdf
./trunk/syn/Altera/CycloneII/uart_16750.bsf
./trunk/syn/Altera/CycloneII/UART16750.srf
./trunk/syn/Altera/CycloneII/slib_clock_div.bsf
./trunk/syn/Altera/CycloneII/UART16750.flow.rpt
./trunk/syn/Altera/CycloneII/UART16750.fit.summary
./trunk/syn/Altera/CycloneII/UART16750.asm.rpt
./trunk/syn/Altera/CycloneII/UART16750.sdc
./trunk/syn/Altera/CycloneII/UART16750.qpf
./trunk/syn/Altera/CycloneII/UART16750.drc.rpt
./trunk/syn/Altera/CycloneII/UART16750.qsf
./trunk/syn/Altera/CycloneII/UART16750.dpf
./trunk/syn/Altera/CycloneII/UART16750.map.smsg
./trunk/syn/Altera/CycloneII/UART16750.qws
./trunk/syn/Altera/CycloneII/UART16750.map.rpt
./trunk/syn/Altera/CycloneII/UART16750.tan.summary
./trunk/syn/Altera/CycloneII/UART16750.done
./trunk/syn/Altera/CycloneII/UART16750.map.summary
./trunk/sim/
./trunk/sim/rtl_sim/
./trunk/sim/rtl_sim/bin/
./trunk/sim/rtl_sim/bin/uart_test_stim.pl
./trunk/sim/rtl_sim/log/
./trunk/sim/rtl_sim/log/uart_log.txt
./trunk/sim/rtl_sim/src/
./trunk/sim/rtl_sim/src/uart_stim.dat
./trunk/sim/rtl_sim/run/
./trunk/sim/rtl_sim/run/tb_uart_wave.do
./trunk/sim/rtl_sim/run/start_simulation.do
./trunk/sim/rtl_sim/run/Makefile
./trunk/doc/
./trunk/doc/LICENSE
./trunk/doc/README
./trunk/bench/
./trunk/bench/vhdl/
./trunk/bench/vhdl/txt_util.vhd
./trunk/bench/vhdl/uart_transactor.vhd
./trunk/bench/vhdl/slib_testbench.vhd
./trunk/bench/vhdl/uart_package.vhd
./trunk/rtl/
./trunk/rtl/vhdl/
./trunk/rtl/vhdl/uart_16750.vhd
./trunk/rtl/vhdl/slib_fifo.vhd
./trunk/rtl/vhdl/uart_transmitter.vhd
./trunk/rtl/vhdl/uart_baudgen.vhd
./trunk/rtl/vhdl/uart_interrupt.vhd
./trunk/rtl/vhdl/slib_mv_filter.vhd
./trunk/rtl/vhdl/slib_clock_div.vhd
./trunk/rtl/vhdl/slib_edge_detect.vhd
./trunk/rtl/vhdl/uart_receiver.vhd
./trunk/rtl/vhdl/slib_input_filter.vhd
./trunk/rtl/vhdl/slib_input_sync.vhd
./trunk/rtl/vhdl/slib_fifo_cyclone2.vhd
./trunk/rtl/vhdl/slib_counter.vhd
./trunk/syn/
./trunk/syn/Altera/
./trunk/syn/Altera/CycloneII/
./trunk/syn/Altera/CycloneII/UART16750.tan.rpt
./trunk/syn/Altera/CycloneII/UART16750.fit.rpt
./trunk/syn/Altera/CycloneII/UART16750.fit.smsg
./trunk/syn/Altera/CycloneII/UART16750.bdf
./trunk/syn/Altera/CycloneII/uart_16750.bsf
./trunk/syn/Altera/CycloneII/UART16750.srf
./trunk/syn/Altera/CycloneII/slib_clock_div.bsf
./trunk/syn/Altera/CycloneII/UART16750.flow.rpt
./trunk/syn/Altera/CycloneII/UART16750.fit.summary
./trunk/syn/Altera/CycloneII/UART16750.asm.rpt
./trunk/syn/Altera/CycloneII/UART16750.sdc
./trunk/syn/Altera/CycloneII/UART16750.qpf
./trunk/syn/Altera/CycloneII/UART16750.drc.rpt
./trunk/syn/Altera/CycloneII/UART16750.qsf
./trunk/syn/Altera/CycloneII/UART16750.dpf
./trunk/syn/Altera/CycloneII/UART16750.map.smsg
./trunk/syn/Altera/CycloneII/UART16750.qws
./trunk/syn/Altera/CycloneII/UART16750.map.rpt
./trunk/syn/Altera/CycloneII/UART16750.tan.summary
./trunk/syn/Altera/CycloneII/UART16750.done
./trunk/syn/Altera/CycloneII/UART16750.map.summary
./trunk/sim/
./trunk/sim/rtl_sim/
./trunk/sim/rtl_sim/bin/
./trunk/sim/rtl_sim/bin/uart_test_stim.pl
./trunk/sim/rtl_sim/log/
./trunk/sim/rtl_sim/log/uart_log.txt
./trunk/sim/rtl_sim/src/
./trunk/sim/rtl_sim/src/uart_stim.dat
./trunk/sim/rtl_sim/run/
./trunk/sim/rtl_sim/run/tb_uart_wave.do
./trunk/sim/rtl_sim/run/start_simulation.do
./trunk/sim/rtl_sim/run/Makefile
./trunk/doc/
./trunk/doc/LICENSE
./trunk/doc/README
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