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文件名称:cpu

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    2012-11-16
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    1.21mb
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用VHDL语言设计简单的CPU,重点设计微操作代码,然后设计CPU各组成模块,最后根据设计的微操作设计微指令,验证设计的正确性。可基本实现加、减、乘、除、移位、循环等操作。-VHDL language is designed to be simple to use the CPU, the focus of the design of micro-operation code, and then design the components of CPU module designed the final design of the micro-operation microinstruction to verify the correctness of the design. Can achieve the basic add, subtract, multiply, divide, transfer, recycling and other operations.
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下载文件列表

cpu/cpu.qpf
cpu/cpu.qsf
cpu/cpu.map.summary
cpu/cpu.done
cpu/br.vhd
cpu/br.bsf
cpu/alu.bsf
cpu/mbr.vhd
cpu/mbr.bsf
cpu/ir.vhd
cpu/pc.vhd
cpu/mar.vhd
cpu/control_unit.vhd
cpu/control_unit.bsf
cpu/cpu.bdf
cpu/ir.bsf
cpu/pc.bsf
cpu/mar.bsf
cpu/memory.mif
cpu/lpm_ram_dq0_waveforms.html
cpu/lpm_ram_dq0_wave0.jpg
cpu/lpm_ram_dq0_wave1.jpg
cpu/lpm_ram_dq0.vhd
cpu/lpm_ram_dq0.cmp
cpu/lpm_ram_dq0.bsf
cpu/rom.mif
cpu/lpm_rom0_waveforms.html
cpu/lpm_rom0_wave0.jpg
cpu/lpm_rom0.vhd
cpu/lpm_rom0.cmp
cpu/lpm_rom0.bsf
cpu/alu.vhd
cpu/cpu.pin
cpu/cpu.fit.smsg
cpu/cpu.fit.summary
cpu/cpu.tan.summary
cpu/cpu.vwf
cpu/cpu.map.rpt
cpu/cpu.fit.rpt
cpu/cpu.asm.rpt
cpu/cpu.tan.rpt
cpu/cpu.flow.rpt
cpu/cpu.sim.rpt
cpu/cpu.qws
cpu/db/cpu.psp
cpu/db/cpu.db_info
cpu/db/cpu.sld_design_entry.sci
cpu/db/cpu.cmp.rdb
cpu/db/prev_cmp_cpu.qmsg
cpu/db/cpu.analyze_file.qmsg
cpu/db/cpu.map.qmsg
cpu/db/cpu.eco.cdb
cpu/db/prev_cmp_cpu.map.qmsg
cpu/db/cpu.hier_info
cpu/db/cpu.cbx.xml
cpu/db/cpu.(1).cnf.cdb
cpu/db/cpu.dbp
cpu/db/cpu.(0).cnf.cdb
cpu/db/cpu.(0).cnf.hdb
cpu/db/cpu.map_bb.logdb
cpu/db/mux_frc.tdf
cpu/db/cpu.(1).cnf.hdb
cpu/db/cpu.(2).cnf.cdb
cpu/db/cpu.sgdiff.hdb
cpu/db/cpu.(2).cnf.hdb
cpu/db/cpu.(3).cnf.cdb
cpu/db/cpu.(3).cnf.hdb
cpu/db/altsyncram_js61.tdf
cpu/db/cpu.(4).cnf.cdb
cpu/db/cpu.(4).cnf.hdb
cpu/db/cpu.(5).cnf.cdb
cpu/db/cpu.(5).cnf.hdb
cpu/db/cpu.(6).cnf.cdb
cpu/db/cpu.(6).cnf.hdb
cpu/db/cpu.(7).cnf.cdb
cpu/db/cpu.(7).cnf.hdb
cpu/db/cpu.(8).cnf.cdb
cpu/db/cpu.(8).cnf.hdb
cpu/db/cpu.(9).cnf.cdb
cpu/db/cpu.(9).cnf.hdb
cpu/db/altsyncram_3ac1.tdf
cpu/db/cpu.(10).cnf.cdb
cpu/db/cpu.(10).cnf.hdb
cpu/db/cpu.(11).cnf.cdb
cpu/db/cpu.(11).cnf.hdb
cpu/db/cpu.(12).cnf.cdb
cpu/db/cpu.(12).cnf.hdb
cpu/db/cpu.(13).cnf.cdb
cpu/db/cpu.(13).cnf.hdb
cpu/db/cpu.rtlv.hdb
cpu/db/cpu.fit.qmsg
cpu/db/cpu.cmp.logdb
cpu/db/wed.wsf
cpu/db/cpu.syn_hier_info
cpu/db/cpu.rtlv_sg.cdb
cpu/db/cpu.pss
cpu/db/cpu.hif
cpu/db/cpu.sgdiff.cdb
cpu/db/cpu.map.logdb
cpu/db/cpu.asm.qmsg
cpu/db/cpu.cmp0.ddb
cpu/db/cpu.tan.qmsg
cpu/db/cpu.rtlv_sg_swap.cdb
cpu/db/cpu.pre_map.hdb
cpu/db/cpu.pre_map.cdb
cpu/db/prev_cmp_cpu.sim.qmsg
cpu/db/cpu.sim.qmsg
cpu/db/cpu.fnsim.qmsg
cpu/db/cpu.map.ecobp
cpu/db/cpu.sim.hdb
cpu/db/cpu.map_bb.cdb
cpu/db/prev_cmp_cpu.fit.qmsg
cpu/db/prev_cmp_cpu.asm.qmsg
cpu/db/cpu.map.cdb
cpu/db/cpu.cmp.ecobp
cpu/db/prev_cmp_cpu.tan.qmsg
cpu/db/cpu.map.hdb
cpu/db/cpu.cmp_bb.logdb
cpu/db/cpu.cmp_bb.rcf
cpu/db/cpu.simfam
cpu/db/cpu.map_bb.hdb
cpu/db/cpu.tis_db_list.ddb
cpu/db/cpu.map.bpm
cpu/db/cpu.fnsim.cdb
cpu/db/cpu.cmp.tdb
cpu/db/cpu.cmp.cdb
cpu/db/cpu.fnsim.hdb
cpu/db/cpu.sim.cvwf
cpu/db/cpu.sim.rdb
cpu/db/cpu.cmp_bb.hdb
cpu/db/cpu.cmp_bb.cdb
cpu/db/cpu.cmp.hdb
cpu/db/cpu.eds_overflow
cpu/db/cpu.cmp.bpm
cpu/db/cpu.signalprobe.cdb
cpu/db/cpu.sld_design_entry_dsc.sci
cpu/db
cpu

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