risc/alu.v
risc/cpu.v
risc/cpu_test.flow.rpt
risc/cpu_test.map.rpt
risc/cpu_test.map.summary
risc/cpu_test.qpf
risc/cpu_test.qsf
risc/cpu_test.qws
risc/cpu_test.v
risc/db/cpu_test.cbx.xml
risc/db/cpu_test.cmp.rdb
risc/db/cpu_test.db_info
risc/db/cpu_test.eco.cdb
risc/db/cpu_test.hif
risc/db/cpu_test.map.qmsg
risc/db/cpu_test.map_bb.hdb
risc/db/cpu_test.sld_design_entry.sci
risc/db/cpu_test.tis_db_list.ddb
risc/dram.v
risc/exp.v
risc/idec.v
risc/incremental_db/README
risc/pram.v
risc/regs.v
risc/risc.cr.mti
risc/risc.mpf
risc/risc8.vcd
risc/vsim.wlf
risc/work/alu/verilog.psm
risc/work/alu/_primary.dat
risc/work/alu/_primary.dbs
risc/work/alu/_primary.vhd
risc/work/cpu/verilog.psm
risc/work/cpu/_primary.dat
risc/work/cpu/_primary.dbs
risc/work/cpu/_primary.vhd
risc/work/cpu_test/verilog.psm
risc/work/cpu_test/_primary.dat
risc/work/cpu_test/_primary.dbs
risc/work/cpu_test/_primary.vhd
risc/work/dram/verilog.psm
risc/work/dram/_primary.dat
risc/work/dram/_primary.dbs
risc/work/dram/_primary.vhd
risc/work/exp/verilog.psm
risc/work/exp/_primary.dat
risc/work/exp/_primary.dbs
risc/work/exp/_primary.vhd
risc/work/idec/verilog.psm
risc/work/idec/_primary.dat
risc/work/idec/_primary.dbs
risc/work/idec/_primary.vhd
risc/work/pram/verilog.psm
risc/work/pram/_primary.dat
risc/work/pram/_primary.dbs
risc/work/pram/_primary.vhd
risc/work/regs/verilog.psm
risc/work/regs/_primary.dat
risc/work/regs/_primary.dbs
risc/work/regs/_primary.vhd
risc/work/_info
risc/work/_vmake
risc/incremental_db/compiled_partitions
risc/work/alu
risc/work/cpu
risc/work/cpu_test
risc/work/dram
risc/work/exp
risc/work/idec
risc/work/pram
risc/work/regs
risc/work/_temp
risc/db
risc/incremental_db
risc/work
risc