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文件名称:SR_Latch

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [C/C++] [源码]
  • 上传时间：
    2012-11-16
  • 文件大小：
    345.54kb
  • 已下载：
    0次
  • 提 供 者：
    Seun****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

RS_latch using vhdl,

When using static gates as building blocks, the most fundamental latch is the simple SR latch, where S and R stand for set and reset. It can be constructed from a pair of cross-coupled NOR (Not OR) logic gates. The stored bit is present on the output marked Q.



Normally, in storage mode, the S and R inputs are both low, and feedback maintains the Q and Q outputs in a constant state, with Q the complement of Q. If S (Set) is pulsed high while R is held low, then the Q output is forced high, and stays high when S returns to low similarly, if R (Reset) is pulsed high while S is held low, then the Q output is forced low, and stays low when R returns to low.-RS_latch using vhdl,

When using static gates as building blocks, the most fundamental latch is the simple SR latch, where S and R stand for set and reset. It can be constructed from a pair of cross-coupled NOR (Not OR) logic gates. The stored bit is present on the output marked Q.



Normally, in storage mode, the S and R inputs are both low, and feedback maintains the Q and Q outputs in a constant state, with Q the complement of Q. If S (Set) is pulsed high while R is held low, then the Q output is forced high, and stays high when S returns to low　similarly, if R (Reset) is pulsed high while S is held low, then the Q output is forced low, and stays low when R returns to low.
相关搜索： sr latch vhdl

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下载文件列表

.lso
fuse.log
isim.cmd
isim.hdlsourcefiles
isim.log
isimwavedata.xwv
SR_Latch.gise
SR_Latch.ise
SR_Latch.prj
SR_Latch.restore
SR_Latch.stx
SR_Latch.v
SR_Latch.xise
SR_Latch.xst
SR_Latch_ise11migration.zip
sr_latch_isim_beh.wfs
SR_Latch_summary.html
SR_Latch_top.prj
SR_Latch_top.spl
SR_Latch_top.stx
SR_Latch_top.sym
SR_Latch_top.v
SR_Latch_top.xst
SR_Latch_top_beh.prj
SR_Latch_top_isim_beh.exe
SR_Latch_top_isim_beh.wdb
sr_latch_top_isim_beh.wfs
SR_Latch_top_stx.prj
SR_Latch_top_summary.html
xilinxsim.ini
isim/SR_Latch_top_isim_beh.exe.sim/GDBMI-In.txt
isim/SR_Latch_top_isim_beh.exe.sim/GDBMI-Out.txt
isim/SR_Latch_top_isim_beh.exe.sim/isimcrash.log
isim/SR_Latch_top_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg
isim/SR_Latch_top_isim_beh.exe.sim/isimkernel.log
isim/SR_Latch_top_isim_beh.exe.sim/netId.dat
isim/SR_Latch_top_isim_beh.exe.sim/SR_Latch_top_isim_beh.exe
isim/SR_Latch_top_isim_beh.exe.sim/tmp_save/_1
isim/SR_Latch_top_isim_beh.exe.sim/work/m_00000000000134643081_1328955399.c
isim/SR_Latch_top_isim_beh.exe.sim/work/m_00000000000134643081_1328955399.didat
isim/SR_Latch_top_isim_beh.exe.sim/work/m_00000000000134643081_1328955399.nt.obj
isim/SR_Latch_top_isim_beh.exe.sim/work/m_00000000000751492074_2073120511.c
isim/SR_Latch_top_isim_beh.exe.sim/work/m_00000000000751492074_2073120511.didat
isim/SR_Latch_top_isim_beh.exe.sim/work/m_00000000000751492074_2073120511.nt.obj
isim/SR_Latch_top_isim_beh.exe.sim/work/m_00000000002724187301_0017209728.c
isim/SR_Latch_top_isim_beh.exe.sim/work/m_00000000002724187301_0017209728.didat
isim/SR_Latch_top_isim_beh.exe.sim/work/m_00000000002724187301_0017209728.nt.obj
isim/SR_Latch_top_isim_beh.exe.sim/work/SR_Latch_top_isim_beh.exe_main.c
isim/SR_Latch_top_isim_beh.exe.sim/work/SR_Latch_top_isim_beh.exe_main.nt.obj
isim/work/@s@r_@latch.sdb
isim/work/@s@r_@latch_top.sdb
isim/work/glbl.sdb
SR_Latch_xdb/tmp/ise.lock
SR_Latch_xdb/tmp/ise/version
SR_Latch_xdb/tmp/ise/__OBJSTORE__/Autonym/
SR_Latch_xdb/tmp/ise/__OBJSTORE__/common/
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ConstraintSystem/
SR_Latch_xdb/tmp/ise/__OBJSTORE__/Cs/
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator11/
SR_Latch_xdb/tmp/ise/__OBJSTORE__/STE/
SR_Latch_xdb/tmp/ise/__OBJSTORE__/_ProjRepoInternal_/
SR_Latch_xdb/tmp/ise/__OBJSTORE__/HierarchicalDesign/__stored_object_table__
SR_Latch_xdb/tmp/ise/__OBJSTORE__/HierarchicalDesign/HDProject/HDProject
SR_Latch_xdb/tmp/ise/__OBJSTORE__/HierarchicalDesign/HDProject/HDProject_StrTbl
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ISimPlugin/SignalOrdering1/SR_Latch_isim_beh.exe
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ISimPlugin/SignalOrdering1/SR_Latch_isim_beh.exe_StrTbl
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ISimPlugin/SignalOrdering1/SR_Latch_top_isim_beh.exe
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ISimPlugin/SignalOrdering1/SR_Latch_top_isim_beh.exe_StrTbl
SR_Latch_xdb/tmp/ise/__OBJSTORE__/PnAutoRun/Scripts/RunOnce_tcl
SR_Latch_xdb/tmp/ise/__OBJSTORE__/PnAutoRun/Scripts/RunOnce_tcl_StrTbl
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/dpm_project_main/dpm_project_main
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ProjectNavigator/dpm_project_main/dpm_project_main_StrTbl
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/CViewSelector
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/CViewSelector_StrTbl
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/File-SynthesisOnly
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/File-SynthesisOnly_StrTbl
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/GuiProjectData
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/GuiProjectData_StrTbl
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/Library-SynthesisOnly
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/Library-SynthesisOnly_StrTbl
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/Process-BehavioralSim-
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/Process-BehavioralSim-DESUT_VERILOG
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/Process-BehavioralSim-DESUT_VERILOG_StrTbl
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/Process-BehavioralSim-_StrTbl
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/Process-SynthesisOnly-DESUT_VERILOG
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/Process-SynthesisOnly-DESUT_VERILOG_StrTbl
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/Source-BehavioralSim-AutoCompile
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/Source-BehavioralSim-AutoCompile_StrTbl
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/Source-SynthesisOnly-AutoCompile
SR_Latch_xdb/tmp/ise/__OBJSTORE__/ProjectNavigatorGui/Source-SynthesisOnly-AutoCompile_StrTbl
SR_Latch_xdb/tmp/ise/__OBJSTORE__/SrcCtrl/SavedOptions/
SR_Latch_xdb/tmp/ise/__OBJSTORE__/xreport/Gc_RvReportViewer-Current-Module
SR_Latch_xdb/tmp/ise/__OBJSTORE__/xreport/Gc_RvReportViewer-Current-Module_StrTbl
SR_Latch_xdb/tmp/ise/__OBJSTORE__/xreport/Gc_RvReportViewer-Module-Data-SR_Latch
SR_Latch_xdb/tmp/ise/__OBJSTORE__/xreport/Gc_RvReportViewer-Module-Data-SR_Latch_StrTbl
SR_Latch_xdb/tmp/ise/__OBJSTORE__/xreport/Gc_RvReportViewer-Module-Data-SR_Latch_top
SR_Latch_xdb/tmp/ise/_

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