文件名称:siluqiangdaqi
-
所属分类:
- 标签属性:
- 上传时间:2012-11-16
-
文件大小:1.74kb
-
已下载:0次
-
提 供 者:
-
相关连接:无下载说明:别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容来自于网络,使用问题请自行百度
1、用feng模块将选手按下按键信号输出高电平给锁存模块lockb,进行锁存的同时发出aim信号实现声音提示,并使count模块进行答题时间的倒计时,在计满100妙后送出声音提示;
2、用ch41a模块将抢答结果转换为二进制数;
3、用sel模块产生数码管片选信号;
4、用ch42a模块将对应数码管片选信号,送出需要的显示信号;
5、用七段译码器dispa模块进行译码。 -1, using feng module will press a key player to a high signal output latch module lockb, issued at the same time to latch the signal aim to achieve prompt voice and answer module count of the countdown time, taking into account the post-Miao 100 sent the voice prompts 2, with the results of ch41a Answer module will convert the binary number 3, with sel digital control module chip select signal 4, with ch42a digital control module to the corresponding chip select signal, the display need to send signal 5, Seven-Segment Decoder with dispa decoding module.
2、用ch41a模块将抢答结果转换为二进制数;
3、用sel模块产生数码管片选信号;
4、用ch42a模块将对应数码管片选信号,送出需要的显示信号;
5、用七段译码器dispa模块进行译码。 -1, using feng module will press a key player to a high signal output latch module lockb, issued at the same time to latch the signal aim to achieve prompt voice and answer module count of the countdown time, taking into account the post-Miao 100 sent the voice prompts 2, with the results of ch41a Answer module will convert the binary number 3, with sel digital control module chip select signal 4, with ch42a digital control module to the corresponding chip select signal, the display need to send signal 5, Seven-Segment Decoder with dispa decoding module.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
用VHDL语言实现四人智力竞赛抢答器的设计.txt
本网站为编程资源及源代码搜集、介绍的搜索网站,版权归原作者所有! 粤ICP备11031372号
1999-2046 搜珍网 All Rights Reserved.