文件名称:upload_code
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每个代码见压缩包内文件名,分别为使用单片机控制AD9627的代码,已在硬件电路实现;基于FPGA的DDR SDRAM控制源代码,将文件夹内文件加入同一工程即可;以及三份FPGA内部学习资料。
C代码开发环境为KeilC,verilog代码开发环境为Quartus。
-See each code within the compressed package file name, respectively, for the use of the AD9627 single-chip control of code, has been in the hardware circuit FPGA-based DDR SDRAM control source code, will be adding a document folder to the same project and three FPGA internal learning materials. C code development environment for KeilC, verilog code development environment for the Quartus.
C代码开发环境为KeilC,verilog代码开发环境为Quartus。
-See each code within the compressed package file name, respectively, for the use of the AD9627 single-chip control of code, has been in the hardware circuit FPGA-based DDR SDRAM control source code, will be adding a document folder to the same project and three FPGA internal learning materials. C code development environment for KeilC, verilog code development environment for the Quartus.
相关搜索: upload_code
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下载文件列表
西安大唐--FPGA&CPLD数字电路设计经验分享.rar
AD9627_Ccode.rar
基于FPGA的DDR SDRAMverilog代码.rar
SDRAM Verilog代码及测试程序.rar
Modelsim使用指南(较好!).rar
华为FPGA设计流程指南.rar
AD9627_Ccode.rar
基于FPGA的DDR SDRAMverilog代码.rar
SDRAM Verilog代码及测试程序.rar
Modelsim使用指南(较好!).rar
华为FPGA设计流程指南.rar
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