文件名称:SPI_IIC_design_example
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- 上传时间:2012-11-16
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文件大小:385.38kb
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ALTERA原厂提供的例程,网上很难找到的,在MAX2系列芯片上实现过,VHDL和VERILOG两种语言编写 IIC读写程序-ALTERA provided the original routine, it is difficult to find online and in the MAX2 series chip-off, VHDL and VERILOG two languages
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下载文件列表
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/code/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/code/SPI_to_I2C.v
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C.cr.mti
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C.mpf
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C.v
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C_test.v
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C_test.v.bak
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/transcript
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/vsim.wlf
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/wave.bmp
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/wave.do
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@i2@c_master/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@i2@c_master/verilog.psm
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@i2@c_master/_primary.dat
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@i2@c_master/_primary.vhd
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_slave/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_slave/verilog.psm
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_slave/_primary.dat
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_slave/_primary.vhd
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c/verilog.psm
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c/_primary.dat
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c/_primary.vhd
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c_test/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c_test/verilog.psm
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c_test/_primary.dat
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c_test/_primary.vhd
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/divider/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/divider/verilog.psm
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/divider/_primary.dat
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/divider/_primary.vhd
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/internal_oss_altufm_osc_7p3/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/internal_oss_altufm_osc_7p3/verilog.psm
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/internal_oss_altufm_osc_7p3/_primary.dat
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/internal_oss_altufm_osc_7p3/_primary.vhd
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/_info
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(0).cnf.cdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(0).cnf.hdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(1).cnf.cdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(1).cnf.hdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(2).cnf.cdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(2).cnf.hdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(3).cnf.cdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(3).cnf.hdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(4).cnf.cdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(4).cnf.hdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.asm.qmsg
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.asm_labs.ddb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cbx.xml
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cmp.cdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cmp.hdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cmp.logdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cmp.rdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cmp.tdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cmp0.ddb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.dbp
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.db_info
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.e
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/code/SPI_to_I2C.v
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C.cr.mti
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C.mpf
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C.v
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C_test.v
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/SPI_to_I2C_test.v.bak
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/transcript
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/vsim.wlf
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/wave.bmp
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/wave.do
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@i2@c_master/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@i2@c_master/verilog.psm
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@i2@c_master/_primary.dat
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@i2@c_master/_primary.vhd
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_slave/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_slave/verilog.psm
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_slave/_primary.dat
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_slave/_primary.vhd
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c/verilog.psm
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c/_primary.dat
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c/_primary.vhd
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c_test/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c_test/verilog.psm
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c_test/_primary.dat
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/@s@p@i_to_@i2@c_test/_primary.vhd
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/divider/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/divider/verilog.psm
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/divider/_primary.dat
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/divider/_primary.vhd
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/internal_oss_altufm_osc_7p3/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/internal_oss_altufm_osc_7p3/verilog.psm
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/internal_oss_altufm_osc_7p3/_primary.dat
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/internal_oss_altufm_osc_7p3/_primary.vhd
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/modelsim/work/_info
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(0).cnf.cdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(0).cnf.hdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(1).cnf.cdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(1).cnf.hdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(2).cnf.cdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(2).cnf.hdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(3).cnf.cdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(3).cnf.hdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(4).cnf.cdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.(4).cnf.hdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.asm.qmsg
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.asm_labs.ddb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cbx.xml
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cmp.cdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cmp.hdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cmp.logdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cmp.rdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cmp.tdb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.cmp0.ddb
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.dbp
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.db_info
AN486_SPI_to_I2C_Altera_MAX_II_CPLD_Design_Example/quartus/db/SPI_to_I2C.e
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