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文件名称:03.EDK8.2

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [C/C++] [源码]
  • 上传时间：
    2012-11-16
  • 文件大小：
    21.76mb
  • 已下载：
    0次
  • 提 供 者：
    肖****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

使用xilinx virtex4芯片，设计环境为EDK，其中包含uart,片外sram操作，flash操作，DDR SDRAM操作，MAC自发自收，audio，video等试验-Xilinx virtex4 use chip design environment for the EDK, which contains the uart, chip sram operation, flash operation, DDR SDRAM operation, MAC spontaneous self-admission, audio, video and other tests
相关搜索： virtex4 EDK EDK8.2 xilinx edk MAC VHDL DDR VHDL xilinx EDK sdram edk vhd EDK UA mac

(系统自动生成,下载前可以参看下载内容)

下载文件列表

03.EDK8.2/source/lab5.c
03.EDK8.2/source/lab5.c.bak
03.EDK8.2/labsolutions/lab6/_impact.cmd
03.EDK8.2/labsolutions/lab6/_impactbatch.log
03.EDK8.2/labsolutions/lab6/bitinit.log
03.EDK8.2/labsolutions/lab6/lab6.cpj
03.EDK8.2/labsolutions/lab6/libgen.log
03.EDK8.2/labsolutions/lab6/param.opt
03.EDK8.2/labsolutions/lab6/platgen.log
03.EDK8.2/labsolutions/lab6/platgen.opt
03.EDK8.2/labsolutions/lab6/system.bsb
03.EDK8.2/labsolutions/lab6/system.log
03.EDK8.2/labsolutions/lab6/system.make
03.EDK8.2/labsolutions/lab6/system.mhs
03.EDK8.2/labsolutions/lab6/system.mss
03.EDK8.2/labsolutions/lab6/system.xmp
03.EDK8.2/labsolutions/lab6/system_incl.make
03.EDK8.2/labsolutions/lab6/wizlog
03.EDK8.2/labsolutions/lab6/xdsgen.log
03.EDK8.2/labsolutions/lab6/synthesis/chipscope_icon_0_wrapper.lso
03.EDK8.2/labsolutions/lab6/synthesis/chipscope_icon_0_wrapper_xst.prj
03.EDK8.2/labsolutions/lab6/synthesis/chipscope_icon_0_wrapper_xst.scr
03.EDK8.2/labsolutions/lab6/synthesis/chipscope_icon_0_wrapper_xst.srp
03.EDK8.2/labsolutions/lab6/synthesis/chipscope_opb_iba.lso
03.EDK8.2/labsolutions/lab6/synthesis/chipscope_opb_iba_0_wrapper.lso
03.EDK8.2/labsolutions/lab6/synthesis/chipscope_opb_iba_0_wrapper_xst.prj
03.EDK8.2/labsolutions/lab6/synthesis/chipscope_opb_iba_0_wrapper_xst.scr
03.EDK8.2/labsolutions/lab6/synthesis/chipscope_opb_iba_0_wrapper_xst.srp
03.EDK8.2/labsolutions/lab6/synthesis/cs_edk_port_mapper_chipscope_opb_iba_0_xst.prj
03.EDK8.2/labsolutions/lab6/synthesis/cs_edk_port_mapper_chipscope_opb_iba_0_xst.scr
03.EDK8.2/labsolutions/lab6/synthesis/cs_edk_port_mapper_chipscope_opb_iba_0_xst.srp
03.EDK8.2/labsolutions/lab6/synthesis/dcm_0_wrapper.lso
03.EDK8.2/labsolutions/lab6/synthesis/dcm_0_wrapper_xst.prj
03.EDK8.2/labsolutions/lab6/synthesis/dcm_0_wrapper_xst.scr
03.EDK8.2/labsolutions/lab6/synthesis/dcm_0_wrapper_xst.srp
03.EDK8.2/labsolutions/lab6/synthesis/debug_module_wrapper.lso
03.EDK8.2/labsolutions/lab6/synthesis/debug_module_wrapper_xst.prj
03.EDK8.2/labsolutions/lab6/synthesis/debug_module_wrapper_xst.scr
03.EDK8.2/labsolutions/lab6/synthesis/debug_module_wrapper_xst.srp
03.EDK8.2/labsolutions/lab6/synthesis/delay_wrapper.lso
03.EDK8.2/labsolutions/lab6/synthesis/delay_wrapper_xst.prj
03.EDK8.2/labsolutions/lab6/synthesis/delay_wrapper_xst.scr
03.EDK8.2/labsolutions/lab6/synthesis/delay_wrapper_xst.srp
03.EDK8.2/labsolutions/lab6/synthesis/dip1_wrapper.lso
03.EDK8.2/labsolutions/lab6/synthesis/dip1_wrapper_xst.prj
03.EDK8.2/labsolutions/lab6/synthesis/dip1_wrapper_xst.scr
03.EDK8.2/labsolutions/lab6/synthesis/dip1_wrapper_xst.srp
03.EDK8.2/labsolutions/lab6/synthesis/dlmb_cntlr_wrapper.lso
03.EDK8.2/labsolutions/lab6/synthesis/dlmb_cntlr_wrapper_xst.prj
03.EDK8.2/labsolutions/lab6/synthesis/dlmb_cntlr_wrapper_xst.scr
03.EDK8.2/labsolutions/lab6/synthesis/dlmb_cntlr_wrapper_xst.srp
03.EDK8.2/labsolutions/lab6/synthesis/dlmb_wrapper.lso
03.EDK8.2/labsolutions/lab6/synthesis/dlmb_wrapper_xst.prj
03.EDK8.2/labsolutions/lab6/synthesis/dlmb_wrapper_xst.scr
03.EDK8.2/labsolutions/lab6/synthesis/dlmb_wrapper_xst.srp
03.EDK8.2/labsolutions/lab6/synthesis/ilmb_cntlr_wrapper.lso
03.EDK8.2/labsolutions/lab6/synthesis/ilmb_cntlr_wrapper_xst.prj
03.EDK8.2/labsolutions/lab6/synthesis/ilmb_cntlr_wrapper_xst.scr
03.EDK8.2/labsolutions/lab6/synthesis/ilmb_cntlr_wrapper_xst.srp
03.EDK8.2/labsolutions/lab6/synthesis/ilmb_wrapper.lso
03.EDK8.2/labsolutions/lab6/synthesis/ilmb_wrapper_xst.prj
03.EDK8.2/labsolutions/lab6/synthesis/ilmb_wrapper_xst.scr
03.EDK8.2/labsolutions/lab6/synthesis/ilmb_wrapper_xst.srp
03.EDK8.2/labsolutions/lab6/synthesis/lmb_bram_wrapper.lso
03.EDK8.2/labsolutions/lab6/synthesis/lmb_bram_wrapper_xst.prj
03.EDK8.2/labsolutions/lab6/synthesis/lmb_bram_wrapper_xst.scr
03.EDK8.2/labsolutions/lab6/synthesis/lmb_bram_wrapper_xst.srp
03.EDK8.2/labsolutions/lab6/synthesis/mb_opb_wrapper.lso
03.EDK8.2/labsolutions/lab6/synthesis/mb_opb_wrapper_xst.prj
03.EDK8.2/labsolutions/lab6/synthesis/mb_opb_wrapper_xst.scr
03.EDK8.2/labsolutions/lab6/synthesis/mb_opb_wrapper_xst.srp
03.EDK8.2/labsolutions/lab6/synthesis/microblaze_0_wrapper.lso
03.EDK8.2/labsolutions/lab6/synthesis/microblaze_0_wrapper_xst.prj
03.EDK8.2/labsolutions/lab6/synthesis/microblaze_0_wrapper_xst.scr
03.EDK8.2/labsolutions/lab6/synthesis/microblaze_0_wrapper_xst.srp
03.EDK8.2/labsolutions/lab6/synthesis/my_led_0_wrapper.lso
03.EDK8.2/labsolutions/lab6/synthesis/my_led_0_wrapper_xst.prj
03.EDK8.2/labsolutions/lab6/synthesis/my_led_0_wrapper_xst.scr
03.EDK8.2/labsolutions/lab6/synthesis/my_led_0_wrapper_xst.srp
03.EDK8.2/labsolutions/lab6/synthesis/opb_gpio_0_wrapper.lso
03.EDK8.2/labsolutions/lab6/synthesis/opb_gpio_0_wrapper_xst.prj
03.EDK8.2/labsolutions/lab6/synthesis/opb_gpio_0_wrapper_xst.scr
03.EDK8.2/labsolutions/lab6/synthesis/opb_gpio_0_wrapper_xst.srp
03.EDK8.2/labsolutions/lab6/synthesis/opb_intc_0_wrapper.lso
03.EDK8.2/labsolutions/lab6/synthesis/opb_intc_0_wrapper_xst.prj
03.EDK8.2/labsolutions/lab6/synthesis/opb_intc_0_wrapper_xst.scr
03.EDK8.2/labsolutions/lab6/synthesis/opb_intc_0_wrapper_xst.srp
03.EDK8.2/labsolutions/lab6/synthesis/rs232_wrapper.

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