clock/clk.asm.rpt
clock/clk.done
clock/clk.eda.rpt
clock/clk.fit.rpt
clock/clk.fit.smsg
clock/clk.fit.summary
clock/clk.flow.rpt
clock/clk.map.rpt
clock/clk.map.summary
clock/clk.pin
clock/clk.pof
clock/clk.ppf
clock/clk.qpf
clock/clk.qsf
clock/clk.qws
clock/clk.sim.rpt
clock/clk.sof
clock/clk.tan.rpt
clock/clk.tan.summary
clock/clk.v
clock/clk.vwf
clock/clk_bb.v
clock/clock_gen.bdf
clock/说明文档.txt
clock/db/clk.(0).cnf.cdb
clock/db/clk.(0).cnf.hdb
clock/db/clk.(1).cnf.cdb
clock/db/clk.(1).cnf.hdb
clock/db/clk.(2).cnf.cdb
clock/db/clk.(2).cnf.hdb
clock/db/clk.asm.qmsg
clock/db/clk.cbx.xml
clock/db/clk.cmp.cdb
clock/db/clk.cmp.hdb
clock/db/clk.cmp.kpt
clock/db/clk.cmp.logdb
clock/db/clk.cmp.rdb
clock/db/clk.cmp.tdb
clock/db/clk.cmp0.ddb
clock/db/clk.dbp
clock/db/clk.db_info
clock/db/clk.eco.cdb
clock/db/clk.eda.qmsg
clock/db/clk.eds_overflow
clock/db/clk.fit.qmsg
clock/db/clk.hier_info
clock/db/clk.hif
clock/db/clk.map.cdb
clock/db/clk.map.hdb
clock/db/clk.map.logdb
clock/db/clk.map.qmsg
clock/db/clk.pre_map.cdb
clock/db/clk.pre_map.hdb
clock/db/clk.psp
clock/db/clk.rtlv.hdb
clock/db/clk.rtlv_sg.cdb
clock/db/clk.rtlv_sg_swap.cdb
clock/db/clk.sgdiff.cdb
clock/db/clk.sgdiff.hdb
clock/db/clk.signalprobe.cdb
clock/db/clk.sim.hdb
clock/db/clk.sim.qmsg
clock/db/clk.sim.rdb
clock/db/clk.sim.vwf
clock/db/clk.sld_design_entry.sci
clock/db/clk.sld_design_entry_dsc.sci
clock/db/clk.syn_hier_info
clock/db/clk.tan.qmsg
clock/db/wed.zsf
clock/simulation/modelsim/clk.vo
clock/simulation/modelsim/clk_modelsim.xrf
clock/simulation/modelsim/clk_v.sdo
clock/simulation/modelsim
clock/db
clock/simulation
clock