文件名称:VGA_LCD
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所属分类:
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- 上传时间:2012-11-16
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文件大小:15.64mb
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已下载:0次
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相关连接:无下载说明:别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容来自于网络,使用问题请自行百度
这个是VGA显示的硬件电路设计,是用Verilog HDL语言写的,供给硬件电路设计者们去用-This is a VGA display hardware circuit design, is written in Verilog HDL language, the supply of hardware circuit designers to use
相关搜索: vhdl
(系统自动生成,下载前可以参看下载内容)
下载文件列表
VGA_LCD/bench/generic_dpram.v
VGA_LCD/bench/generic_spram.v
VGA_LCD/bench/sync_check.v
VGA_LCD/bench/tests.v
VGA_LCD/bench/test_bench_top.v
VGA_LCD/bench/timescale.v
VGA_LCD/bench/vga_clkgen.v
VGA_LCD/bench/vga_colproc.v
VGA_LCD/bench/vga_csm_pb.v
VGA_LCD/bench/vga_curproc.v
VGA_LCD/bench/vga_cur_cregs.v
VGA_LCD/bench/vga_defines.v
VGA_LCD/bench/vga_enh_top.v
VGA_LCD/bench/vga_fifo.v
VGA_LCD/bench/vga_fifo_dc.v
VGA_LCD/bench/vga_pgen.v
VGA_LCD/bench/vga_tgen.v
VGA_LCD/bench/vga_vtim.v
VGA_LCD/bench/vga_wb_master.v
VGA_LCD/bench/vga_wb_slave.v
VGA_LCD/bench/wb_b3_check.v
VGA_LCD/bench/wb_mast_model.v
VGA_LCD/bench/wb_model_defines.v
VGA_LCD/bench/wb_slv_model.v
VGA_LCD/doc/http___www.opencores.org_cvsweb.cgi_~checkout~_vga_lcd_doc_vga_core.pdf_rev=1.pdf
VGA_LCD/doc/vga_core_enh.doc
VGA_LCD/rtl/generic_dpram.v
VGA_LCD/rtl/generic_spram.v
VGA_LCD/rtl/timescale.v
VGA_LCD/rtl/vga_clkgen.v
VGA_LCD/rtl/vga_colproc.v
VGA_LCD/rtl/vga_csm_pb.v
VGA_LCD/rtl/vga_curproc.v
VGA_LCD/rtl/vga_cur_cregs.v
VGA_LCD/rtl/vga_defines.v
VGA_LCD/rtl/vga_enh_top.v
VGA_LCD/rtl/vga_fifo.v
VGA_LCD/rtl/vga_fifo_dc.v
VGA_LCD/rtl/vga_pgen.v
VGA_LCD/rtl/vga_tgen.v
VGA_LCD/rtl/vga_vtim.v
VGA_LCD/rtl/vga_wb_master.v
VGA_LCD/rtl/vga_wb_slave.v
VGA_LCD/sim/bin/Makefile.txt
VGA_LCD/software/include/oc_vga_lcd.h
VGA_LCD/software/新建文件夹/TortoiseCVS-1.10.6.exe
VGA_LCD/syn/bin/comp.dc
VGA_LCD/syn/bin/design_spec.dc
VGA_LCD/syn/bin/lib_spec.dc
VGA_LCD/syn/bin/read.dc
VGA_LCD/sim/bin
VGA_LCD/sim/run
VGA_LCD/software/drviers
VGA_LCD/software/include
VGA_LCD/software/新建文件夹
VGA_LCD/syn/bin
VGA_LCD/syn/log
VGA_LCD/syn/out
VGA_LCD/syn/run
VGA_LCD/bench
VGA_LCD/doc
VGA_LCD/rtl
VGA_LCD/sim
VGA_LCD/software
VGA_LCD/syn
VGA_LCD
VGA_LCD/bench/generic_spram.v
VGA_LCD/bench/sync_check.v
VGA_LCD/bench/tests.v
VGA_LCD/bench/test_bench_top.v
VGA_LCD/bench/timescale.v
VGA_LCD/bench/vga_clkgen.v
VGA_LCD/bench/vga_colproc.v
VGA_LCD/bench/vga_csm_pb.v
VGA_LCD/bench/vga_curproc.v
VGA_LCD/bench/vga_cur_cregs.v
VGA_LCD/bench/vga_defines.v
VGA_LCD/bench/vga_enh_top.v
VGA_LCD/bench/vga_fifo.v
VGA_LCD/bench/vga_fifo_dc.v
VGA_LCD/bench/vga_pgen.v
VGA_LCD/bench/vga_tgen.v
VGA_LCD/bench/vga_vtim.v
VGA_LCD/bench/vga_wb_master.v
VGA_LCD/bench/vga_wb_slave.v
VGA_LCD/bench/wb_b3_check.v
VGA_LCD/bench/wb_mast_model.v
VGA_LCD/bench/wb_model_defines.v
VGA_LCD/bench/wb_slv_model.v
VGA_LCD/doc/http___www.opencores.org_cvsweb.cgi_~checkout~_vga_lcd_doc_vga_core.pdf_rev=1.pdf
VGA_LCD/doc/vga_core_enh.doc
VGA_LCD/rtl/generic_dpram.v
VGA_LCD/rtl/generic_spram.v
VGA_LCD/rtl/timescale.v
VGA_LCD/rtl/vga_clkgen.v
VGA_LCD/rtl/vga_colproc.v
VGA_LCD/rtl/vga_csm_pb.v
VGA_LCD/rtl/vga_curproc.v
VGA_LCD/rtl/vga_cur_cregs.v
VGA_LCD/rtl/vga_defines.v
VGA_LCD/rtl/vga_enh_top.v
VGA_LCD/rtl/vga_fifo.v
VGA_LCD/rtl/vga_fifo_dc.v
VGA_LCD/rtl/vga_pgen.v
VGA_LCD/rtl/vga_tgen.v
VGA_LCD/rtl/vga_vtim.v
VGA_LCD/rtl/vga_wb_master.v
VGA_LCD/rtl/vga_wb_slave.v
VGA_LCD/sim/bin/Makefile.txt
VGA_LCD/software/include/oc_vga_lcd.h
VGA_LCD/software/新建文件夹/TortoiseCVS-1.10.6.exe
VGA_LCD/syn/bin/comp.dc
VGA_LCD/syn/bin/design_spec.dc
VGA_LCD/syn/bin/lib_spec.dc
VGA_LCD/syn/bin/read.dc
VGA_LCD/sim/bin
VGA_LCD/sim/run
VGA_LCD/software/drviers
VGA_LCD/software/include
VGA_LCD/software/新建文件夹
VGA_LCD/syn/bin
VGA_LCD/syn/log
VGA_LCD/syn/out
VGA_LCD/syn/run
VGA_LCD/bench
VGA_LCD/doc
VGA_LCD/rtl
VGA_LCD/sim
VGA_LCD/software
VGA_LCD/syn
VGA_LCD
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