文件名称:09-02_fangzhen
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Every time a byte becomes available from the serial port, then "RxD_data_ready" is active for one clock period.
The PC sends us data through the serial port in 8-bits mode. Ideally, we would need to receive 9 bits from the PC, so that we can drive the 8-bits data bus and the "RS" line of the LCD module. For now, let s use the MSB (bit 7) of the data received to drive "RS", and send only 7 bits to the data bus.
The PC sends us data through the serial port in 8-bits mode. Ideally, we would need to receive 9 bits from the PC, so that we can drive the 8-bits data bus and the "RS" line of the LCD module. For now, let s use the MSB (bit 7) of the data received to drive "RS", and send only 7 bits to the data bus.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
09-02_fangzhen/BIN_BCD_1.v
09-02_fangzhen/BIN_BCD_1_TEST.v
09-02_fangzhen/BIN_BCD_2.v
09-02_fangzhen/BIN_BCD_2_TEST.v
09-02_fangzhen/BIN_BCD_3.v
09-02_fangzhen/BIN_BCD_3_TEST.v
09-02_fangzhen/BIN_BCD_4.v
09-02_fangzhen/BIN_BCD_4_TEST.v
09-02_fangzhen/LCD_S.v
09-02_fangzhen/LCD_S_TEST.v
09-02_fangzhen
09-02_fangzhen/BIN_BCD_1_TEST.v
09-02_fangzhen/BIN_BCD_2.v
09-02_fangzhen/BIN_BCD_2_TEST.v
09-02_fangzhen/BIN_BCD_3.v
09-02_fangzhen/BIN_BCD_3_TEST.v
09-02_fangzhen/BIN_BCD_4.v
09-02_fangzhen/BIN_BCD_4_TEST.v
09-02_fangzhen/LCD_S.v
09-02_fangzhen/LCD_S_TEST.v
09-02_fangzhen
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