文件名称:ram
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- 上传时间:2012-11-16
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文件大小:194.49kb
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使用Altera公司的FPGA进行VHDL开发。使用quartus2 9.0软件在EP1C3T144C8开发板上用硬件描述语言实现一个RAM存储器。-The use of Altera' s FPGA-VHDL development. Use quartus2 9.0 software EP1C3T144C8 development board with hardware descr iption language to achieve a RAM memory.
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下载文件列表
ram/db/ram.(0).cnf.cdb
ram/db/ram.(0).cnf.hdb
ram/db/ram.asm.qmsg
ram/db/ram.cbx.xml
ram/db/ram.cmp.bpm
ram/db/ram.cmp.cdb
ram/db/ram.cmp.ecobp
ram/db/ram.cmp.hdb
ram/db/ram.cmp.logdb
ram/db/ram.cmp.rdb
ram/db/ram.cmp.tdb
ram/db/ram.cmp0.ddb
ram/db/ram.cmp_bb.cdb
ram/db/ram.cmp_bb.hdb
ram/db/ram.cmp_bb.logdb
ram/db/ram.cmp_bb.rcf
ram/db/ram.dbp
ram/db/ram.db_info
ram/db/ram.eco.cdb
ram/db/ram.fit.qmsg
ram/db/ram.hier_info
ram/db/ram.hif
ram/db/ram.map.bpm
ram/db/ram.map.cdb
ram/db/ram.map.ecobp
ram/db/ram.map.hdb
ram/db/ram.map.logdb
ram/db/ram.map.qmsg
ram/db/ram.map_bb.cdb
ram/db/ram.map_bb.hdb
ram/db/ram.map_bb.logdb
ram/db/ram.pre_map.cdb
ram/db/ram.pre_map.hdb
ram/db/ram.psp
ram/db/ram.pss
ram/db/ram.rtlv.hdb
ram/db/ram.rtlv_sg.cdb
ram/db/ram.rtlv_sg_swap.cdb
ram/db/ram.sgdiff.cdb
ram/db/ram.sgdiff.hdb
ram/db/ram.signalprobe.cdb
ram/db/ram.sld_design_entry.sci
ram/db/ram.sld_design_entry_dsc.sci
ram/db/ram.syn_hier_info
ram/db/ram.tan.qmsg
ram/db/ram.tis_db_list.ddb
ram/db/wed.wsf
ram/ram.asm.rpt
ram/ram.done
ram/ram.fit.rpt
ram/ram.fit.smsg
ram/ram.fit.summary
ram/ram.flow.rpt
ram/ram.map.rpt
ram/ram.map.summary
ram/ram.pin
ram/ram.pof
ram/ram.qpf
ram/ram.qsf
ram/ram.qws
ram/ram.sim.rpt
ram/ram.sof
ram/ram.tan.rpt
ram/ram.tan.summary
ram/ram.vhd
ram/ram.vhd.bak
ram/ram.vwf
ram/db
ram
ram/db/ram.(0).cnf.hdb
ram/db/ram.asm.qmsg
ram/db/ram.cbx.xml
ram/db/ram.cmp.bpm
ram/db/ram.cmp.cdb
ram/db/ram.cmp.ecobp
ram/db/ram.cmp.hdb
ram/db/ram.cmp.logdb
ram/db/ram.cmp.rdb
ram/db/ram.cmp.tdb
ram/db/ram.cmp0.ddb
ram/db/ram.cmp_bb.cdb
ram/db/ram.cmp_bb.hdb
ram/db/ram.cmp_bb.logdb
ram/db/ram.cmp_bb.rcf
ram/db/ram.dbp
ram/db/ram.db_info
ram/db/ram.eco.cdb
ram/db/ram.fit.qmsg
ram/db/ram.hier_info
ram/db/ram.hif
ram/db/ram.map.bpm
ram/db/ram.map.cdb
ram/db/ram.map.ecobp
ram/db/ram.map.hdb
ram/db/ram.map.logdb
ram/db/ram.map.qmsg
ram/db/ram.map_bb.cdb
ram/db/ram.map_bb.hdb
ram/db/ram.map_bb.logdb
ram/db/ram.pre_map.cdb
ram/db/ram.pre_map.hdb
ram/db/ram.psp
ram/db/ram.pss
ram/db/ram.rtlv.hdb
ram/db/ram.rtlv_sg.cdb
ram/db/ram.rtlv_sg_swap.cdb
ram/db/ram.sgdiff.cdb
ram/db/ram.sgdiff.hdb
ram/db/ram.signalprobe.cdb
ram/db/ram.sld_design_entry.sci
ram/db/ram.sld_design_entry_dsc.sci
ram/db/ram.syn_hier_info
ram/db/ram.tan.qmsg
ram/db/ram.tis_db_list.ddb
ram/db/wed.wsf
ram/ram.asm.rpt
ram/ram.done
ram/ram.fit.rpt
ram/ram.fit.smsg
ram/ram.fit.summary
ram/ram.flow.rpt
ram/ram.map.rpt
ram/ram.map.summary
ram/ram.pin
ram/ram.pof
ram/ram.qpf
ram/ram.qsf
ram/ram.qws
ram/ram.sim.rpt
ram/ram.sof
ram/ram.tan.rpt
ram/ram.tan.summary
ram/ram.vhd
ram/ram.vhd.bak
ram/ram.vwf
ram/db
ram
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