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文件名称:FPGA_Book_cd

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [ASM] [源码]
  • 上传时间：
    2012-11-16
  • 文件大小：
    1.44mb
  • 已下载：
    0次
  • 提 供 者：
    呙***
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

《无线通信FPGA设计》包含的所有例子源码，包括matlab仿真和verilog源码，本书内容还是非常丰富的，涉及无线通信领域各个方面。不过对于一些比较新的技术，其FPGA实现部分过于简略，难以在工程中实用化。-" Wireless FPGA Design"　contains all the examples source code, including the matlab simulation and verilog source code, the contents of this book is still very rich, involved in all aspects of the field of wireless communications. But for some relatively new technology, some of its FPGA implementation is too brief, it is difficult in practical engineering.
相关搜索： Verilog Wireless wireless verilog Verilog source code VHDL Wireless MATLAB wireless vhdl

(系统自动生成,下载前可以参看下载内容)

下载文件列表

FPGA_Book_cd/Chapter10 Sample/eth_clockgen.v
FPGA_Book_cd/Chapter10 Sample/eth_cop.v
FPGA_Book_cd/Chapter10 Sample/eth_crc.v
FPGA_Book_cd/Chapter10 Sample/eth_defines.v
FPGA_Book_cd/Chapter10 Sample/eth_fifo.v
FPGA_Book_cd/Chapter10 Sample/eth_host.v
FPGA_Book_cd/Chapter10 Sample/eth_maccontrol.v
FPGA_Book_cd/Chapter10 Sample/eth_macstatus.v
FPGA_Book_cd/Chapter10 Sample/eth_memory.v
FPGA_Book_cd/Chapter10 Sample/eth_miim.v
FPGA_Book_cd/Chapter10 Sample/eth_outputcontrol.v
FPGA_Book_cd/Chapter10 Sample/eth_phy.v
FPGA_Book_cd/Chapter10 Sample/eth_phy_defines.v
FPGA_Book_cd/Chapter10 Sample/eth_random.v
FPGA_Book_cd/Chapter10 Sample/eth_receivecontrol.v
FPGA_Book_cd/Chapter10 Sample/eth_register.v
FPGA_Book_cd/Chapter10 Sample/eth_registers.v
FPGA_Book_cd/Chapter10 Sample/eth_rxaddrcheck.v
FPGA_Book_cd/Chapter10 Sample/eth_rxcounters.v
FPGA_Book_cd/Chapter10 Sample/eth_rxethmac.v
FPGA_Book_cd/Chapter10 Sample/eth_rxstatem.v
FPGA_Book_cd/Chapter10 Sample/eth_shiftreg.v
FPGA_Book_cd/Chapter10 Sample/eth_spram_256x32.v
FPGA_Book_cd/Chapter10 Sample/eth_top.v
FPGA_Book_cd/Chapter10 Sample/eth_transmitcontrol.v
FPGA_Book_cd/Chapter10 Sample/eth_txcounters.v
FPGA_Book_cd/Chapter10 Sample/eth_txethmac.v
FPGA_Book_cd/Chapter10 Sample/eth_txstatem.v
FPGA_Book_cd/Chapter10 Sample/eth_wishbone.v
FPGA_Book_cd/Chapter10 Sample/tb_cop.v
FPGA_Book_cd/Chapter10 Sample/tb_ethernet.v
FPGA_Book_cd/Chapter10 Sample/tb_ethernet_with_cop.v
FPGA_Book_cd/Chapter10 Sample/tb_eth_defines.v
FPGA_Book_cd/Chapter10 Sample/tb_eth_top.v
FPGA_Book_cd/Chapter10 Sample/timescale.v
FPGA_Book_cd/Chapter10 Sample/wb_bus_mon.v
FPGA_Book_cd/Chapter10 Sample/wb_master32.v
FPGA_Book_cd/Chapter10 Sample/wb_master_behavioral.v
FPGA_Book_cd/Chapter10 Sample/wb_model_defines.v
FPGA_Book_cd/Chapter10 Sample/wb_slave_behavioral.v
FPGA_Book_cd/Chapter10 Sample/使用说明.txt
FPGA_Book_cd/Chapter4 Sample/I2C/automake.log
FPGA_Book_cd/Chapter4 Sample/I2C/coregen.log
FPGA_Book_cd/Chapter4 Sample/I2C/coregen.prj
FPGA_Book_cd/Chapter4 Sample/I2C/I2C.dhp
FPGA_Book_cd/Chapter4 Sample/I2C/I2C.npl
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_bit_ctrl.cmd_log
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_bit_ctrl.lso
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_bit_ctrl.ngc
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_bit_ctrl.ngr
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_bit_ctrl.prj
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_bit_ctrl.stx
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_bit_ctrl.syr
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_bit_ctrl.v
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_bit_ctrl.v.bak
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_bit_ctrl_vhdl.prj
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_byte_ctrl.cmd_log
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_byte_ctrl.lso
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_byte_ctrl.ngc
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_byte_ctrl.ngr
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_byte_ctrl.prj
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_byte_ctrl.stx
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_byte_ctrl.syr
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_byte_ctrl.v
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_byte_ctrl.v.bak
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_byte_ctrl_vhdl.prj
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_defines.v
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_defines.v.bak
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_top.cmd_log
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_top.lso
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_top.ngc
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_top.ngr
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_top.prj
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_top.stx
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_top.syr
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_top.v
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_top.v.bak
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_master_top_vhdl.prj
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_slave_model.fdo
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_slave_model.ndo
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_slave_model.udo
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_slave_model.v
FPGA_Book_cd/Chapter4 Sample/I2C/i2c_slave_model.v.bak
FPGA_Book_cd/Chapter4 Sample/I2C/prjname.lso
FPGA_Book_cd/Chapter4 Sample/I2C/timescale.v
FPGA_Book_cd/Chapter4 Sample/I2C/transcript
FPGA_Book_cd/Chapter4 Sample/I2C/tst_bench_top.v
FPGA_Book_cd/Chapter4 Sample/I2C/wb_master_model.v
FPGA_Book_cd/Chapter4 Sample/I2C/wb_master_model.v.bak
FPGA_Book_cd/Chapter4 Sample/I2C/work/glbl/verilog.asm
FPGA_Book_cd/Chapter4 Sample/I2C/work/glbl/_primary.dat
FPGA_Book_cd/Chapter4 Sample/I2C/work/glbl/_primary.vhd
FPGA_Book_cd/Chapter4 Sample/I2C/work/i2c_slave_model/verilog.asm
FPGA_Book_cd/Chapter4 Sample/I2C/work/i2c_slave_model/_primary.dat
FPGA_Book_cd/Chapter4 Sample/I2C/work/i2c_slave_model/_primary.vhd
FPGA_Book_cd/Chapter4 Sample/I2C/work/_info
FPGA_Book_cd/Chapter4 Sample/I2C/xst/work/hdllib.ref
FPGA_Book_cd/Chapter4 Sample/I2C/xst/work/vlg07/i2c_master_bit_ctrl.bin
FPGA_Book_cd/Chapter4 Sample/I2C/xst/work/vlg5C/i2c_master_byte_ctrl.bin
FPGA_Book_cd/Chapter4 Sample/I2C/xst/work/vlg67/i2c_master_top.bin
FPGA_Book_c

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