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文件名称:aes128

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  • 上传时间:
    2012-11-16
  • 文件大小:
    2.91mb
  • 已下载:
    0次
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    别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容来自于网络,使用问题请自行百度

AES实现的效率如面积、吞吐量和功耗等,主要是由列混合变换和S 盒的实现决定的。S 盒单元的实现成为设

计的重点,它的硬件实现在很大程度上决定着整个芯片的面积大小。

-AES to achieve efficiency, such as area, throughput and power consumption, mainly by the S box column mixing transformation and the realization of decision. S box unit designed to achieve to become the focus of its hardware implementation to a large extent determine the size of the entire chip area.
相关搜索: AES vhdl VHDL aes128 AES

(系统自动生成,下载前可以参看下载内容)

下载文件列表

aes128/rtl/a.v
aes128/rtl/aes_cipher_top.v
aes128/rtl/aes_key_expand_128.v
aes128/rtl/aes_rcon.v
aes128/rtl/aes_sbox.v
aes128/rtl/timescale.v
aes128/aes_128/1.cr.mti
aes128/aes_128/1.mpf
aes128/aes_128/aes_128.fsdb
aes128/aes_128/aes_cipher_top.v
aes128/aes_128/aes_key_expand_128.v
aes128/aes_128/aes_rcon.v
aes128/aes_128/gf_sbox.v
aes128/aes_128/readme.txt
aes128/aes_128/test_bench_top.v
aes128/aes_128/timescale.v
aes128/aes_128/transcript
aes128/aes_128/work/_info
aes128/aes_128/work/test/verilog.asm
aes128/aes_128/work/test/_primary.dat
aes128/aes_128/work/test/_primary.vhd
aes128/aes_128/work/sbox_square/verilog.asm
aes128/aes_128/work/sbox_square/_primary.dat
aes128/aes_128/work/sbox_square/_primary.vhd
aes128/aes_128/work/sbox_multip_e/verilog.asm
aes128/aes_128/work/sbox_multip_e/_primary.dat
aes128/aes_128/work/sbox_multip_e/_primary.vhd
aes128/aes_128/work/sbox_multip/verilog.asm
aes128/aes_128/work/sbox_multip/_primary.dat
aes128/aes_128/work/sbox_multip/_primary.vhd
aes128/aes_128/work/sbox_inverse/verilog.asm
aes128/aes_128/work/sbox_inverse/_primary.dat
aes128/aes_128/work/sbox_inverse/_primary.vhd
aes128/aes_128/work/gf_sbox/verilog.asm
aes128/aes_128/work/gf_sbox/_primary.dat
aes128/aes_128/work/gf_sbox/_primary.vhd
aes128/aes_128/work/aes_sbox/verilog.asm
aes128/aes_128/work/aes_sbox/_primary.dat
aes128/aes_128/work/aes_sbox/_primary.vhd
aes128/aes_128/work/aes_rcon/verilog.asm
aes128/aes_128/work/aes_rcon/_primary.dat
aes128/aes_128/work/aes_rcon/_primary.vhd
aes128/aes_128/work/aes_key_expand_128/verilog.asm
aes128/aes_128/work/aes_key_expand_128/_primary.dat
aes128/aes_128/work/aes_key_expand_128/_primary.vhd
aes128/aes_128/work/aes_cipher_top/verilog.asm
aes128/aes_128/work/aes_cipher_top/_primary.dat
aes128/aes_128/work/aes_cipher_top/_primary.vhd
aes128/aes_128/work/test
aes128/aes_128/work/sbox_square
aes128/aes_128/work/sbox_multip_e
aes128/aes_128/work/sbox_multip
aes128/aes_128/work/sbox_inverse
aes128/aes_128/work/gf_sbox
aes128/aes_128/work/aes_sbox
aes128/aes_128/work/aes_rcon
aes128/aes_128/work/aes_key_expand_128
aes128/aes_128/work/aes_cipher_top
aes128/aes_128/work
aes128/rtl
aes128/aes_128
aes128

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