搜索资源列表
Cordic
- cordic算法ip核,国外网站搞到的,可以应用于电机控制，快速数值计算，基于FPGA硬件实现-cordic ip core,just enjoy
dds
- 本设计使用8051单片机ip核，并用VHDL语言设计DDS的各功能模块，利用顶层设计的思想组合成DDS（直接数字频率综合）函数信号发生器，并与单片机ip核的I/O口相连。编译完下载到可编程逻辑器件中（FPGA），实现相应的功能。该设计中使用的是LCD2004液晶显示。-dds
fpga_mcu_uart
- 用FPGA 开发板 SPARTAN3实现的串口程序，用XILINX 自带的ip核 -Achieved with the FPGA development board SPARTAN3 serial program that comes with the ip nuclear XILINX
CIDE_C0
- 流水灯，把程序送到FPGA中，在IP软核上实现流水灯的功能-Water lamp
DDR2_controller
- DDR2控制器IP的设计与FPGA实现，使用verilog语言-DDR2 Controller IP Design and FPGA implementation, use the verilog language
FPGA_FFT
- 基于IP核的FPGA FFT算法模块的设计与实现 在QUATUSII下实现-IP-based core module FPGA FFT algorithm design and implementation be achieved in QUATUSII
pipelined_fft_256_latest
- FFT的ip核，是256位的，可以用在FPGA上进行FFT操作。-FFT' s ip core, is 256, and can be used in FPGA on FFT operation.
ref-sqroot
- 求平方根的ip核，Altera提供，可以用在FPGA上，是AHDL语言写的，不开放源码-Square root of the ip seeking nuclear, Altera provides, can be used in FPGA, is written in AHDL, not open source
PWMcore
- 基于xilinx FPGA软核microblaze编写的PWM波产生IP核，在EXCD开发板上调试通过，内附UCF文件和说明-it s an IP core based on microblaze,it can produce pwm wave.
miniuart2
- 用ＶＨＤＬ在CPLD/FPGA上实现与PC机的RS232通信-This UART (Universal Asynchronous Receiver Transmitter) is designed to make an interface between a RS232 line and a wishbone bus, or a microcontroller, or an IP core. It works fine connected to the serial port of a
design
- 详细讲述了FPGA仿真与设计环境的建立，以及如何使用IP核，如何烧录文件-Detail the FPGA simulation and design environment to establish, and how to use IP cores, how to burn files
blk_write
- verilog 块ram写入操作 fpga xilinx ip core-Verilog block_ram module fpga xilinx ip core
ninek468c
- 基于FPGA的IP模块程序，包括数字输入输出控制，寄存器控制和访问-IP MODULE
UART
- 用硬件描述语言实现的uart的IPcore，有详细的注释和测试文件-Hardware descr iption language of the H.264 encoder, detailed notes and test files
WATERMARKING_FPGA_BITSTREAM_FOR_IP_PROTECTION
- WATERMARKING FPGA BITSTREAM FOR IP PROTECTION
ml510_bsb1_std_ip_ppc440
- 这是Xilinx公司FPGA的标准的基于PowerPC440的IP包底层驱动程序，标准的，很难得。-This is the standard Xilinx, FPGA-based IP packet PowerPC440 the underlying drivers, standard, hard to come by.
float01092
- xilinx FPGA中浮点乘法IP核的应用，已通过验证-xilinx FPGA multiply IP
AIC23IP
- AIC23的IP核，提供ＮＩＯＳ ＣＰＵ与FPGA 的通信方式-AIC23' s IP core, providing NIOS CPU means of communication with the FPGA
source
- FPGA中实现I2C接口的一个IP核，包含verilog及VHDL代码。方便迅速理解和开发I2C总线接口。-FPGA to implement an I2C interface IP core that contains verilog and VHDL code. Facilitate rapid understanding and development of I2C bus interface.
aes_core.tar
- 基于FPGA平台的256为AES加密IP核-FPGA-based platform for the AES encryption IP core 256