搜索资源列表
testwren
- altera 公司的block ram IP核读写功能测试模块 已经验证通过-altera' s block ram IP core functional literacy test module has been verified by
IDT7026
- 双口RAM驱动程序及测试,具体设计时可参考,采用sem实现-Dual-port RAM and test driver
suspend_test
- kernel power suspend_test.c - Suspend to RAM and standby test facility.
led_TEST
- 这是一个在KEIL平台上的S3C2410测试程序,PF7控制led等闪烁。大家可以参考里面的RAM和ROM设置-This is a in KEIL platform S3C2410 test procedure, PF7 control led flashing. You can refer to the RAM and ROM set inside
2GSD
- 读2G SD卡(STC89C54或者RAM更大的单片机)写图片 测试程序 已通过-Read 2G SD card (STC89C54 or greater RAM MCU) write picture test program has passed
sp6ex18
- 基于Verilog HDL的对片内RAM进行连续读写测试实例-Based on the on-chip RAM for continuous reading and writing test cases for Verilog HDL
ramtest
- ramtest.cpp will allocate 1mb of RAM until it is killed. This is a great way to test how much ram you actually have available to programs. Use in Linux.
music-player
- 开机先检测字库是否存在,如果检测无问题,则对VS1053进行RAM测试和正弦测试,测试完后开始循环播-Boot to detect whether there is a font, if there is no problem with the detection, the VS1053 of ram and sinusoidal test. After the test began to broadcast cycle
adcv_flash_v7
- 用MCU来控制AD模块,测量电压值,先存入到MCU的RAM中,并再传到flash中-test ad value for flash by mcu
F0501
- 汽车VCU控制器测试工装的程序,STM32单片机扩展总线读写FPGA内部RAM,DDS方式产生PWM,PWM频率,脉宽测量功能(Automotive VCU controller test tooling procedures, STM32 microcontroller expansion bus read and write FPGA, the internal RAM, DDS way to generate PWM, PWM frequency, pulse width measurem
U-Boot启动第二阶段代码分析
- U-Boot第一阶段的启动流程。(nandflash启动,把nand的4k代码考到sram中,因为nand没址线,不能映射到内存,所以通过sram进行过度,sram中4k代码把整个uboot拷贝到sdram上,初始化好堆栈,为c语言提供条件,进入uboot的第二阶段! )这个阶段主要是初始化硬件设备,为加载U-Boot的第二阶段代码准备RAM空间最后跳转到lib_arm/board.c中start_armboot函数,这是第二阶段的入口点。(U-Boot first phase of the s
BLDC
- 提供原理图和相应的原代码,源代码是基于免费开源CoOS(UCOS类似)操作系统上写的,在学习无刷电机的控制同时还能学习到操作系统的知识。同时提供用Matlab的GUI编写的串口接收程序和开源的代码,实时接收速度和电流信息,便于PID测试,并且有CAN(TJA1050)接口。同时自己可以进行修改学习Matlab的GUI编程。 1. STM32F103RB处理器 时钟72M Flash 64K RAM 20K 2. MOSFET SUD35N05-26L 55V 35A Rds=0.02 3. M