搜索资源列表
dds
- 基于fpga的函数发生器设计通过fpga实现正弦波输出-基于fpga的函数发生器
RS232
- RS232的FPGA通讯程序,用的是VHDL语言写的,非常好用-RS232 communication program of the FPGA, using the VHDL language, very easy to use
61EDA_D1037
- 实现IIC协议,非常适合初学FPGA者,是很好的参考代码。-EEPROM
hpiir
- FPGA文件程序,irr型低通滤波器,vhd程序 -FPGA program file, irr-type low-pass filter, vhd procedures
ADC0809VHDL
- 8.4 ADC0809 VHDL控制程序 见随书所附光盘中文件:ADC0809VHDL程序与仿真。 --文件名:ADC0809.vhd --功能:基于VHDL语言,实现对ADC0809简单控制 --说明:ADC0809没有内部时钟,需外接10KHz~1290Hz的时钟信号,这里由FPGA的系 --统时钟(50MHz)经256分频得到clk1(195KHz)作为ADC0809转换工作时钟。 --最后修改日期:2004.3.20 -8.4 ADC0809 VHDL con
LEDVHDL
- 8.2 LED控制VHDL程序与仿真 本节分别介绍采用FPGA对LED进行静态和动态显示的数字时钟控制程序。 1. 例1:FPGA驱动LED静态显示 --文件名:decoder.vhd。 --功能:译码输出模块,LED为共阳接法。 --最后修改日期:2004.3.24。 -8.2 LED control and simulation of VHDL procedures introduced in this section of the LED using FPGA st
Flash_FPAG_JTAG
- FPGA或者CPLD通过JTAG接口对FLASH进行读写的资料。非常有用-Programming Flash Memory from FPAGs and CPLDs Using the JTAG Port. Very useful
quartus-work
- 基于FPGA的VERILOG的分频器的设计,10分频设计的源代码和设计思路-Based od FPGA
FPGA
- fpga的频率教程,附有源程序(vhdl语言)-frequency fpga tutorials with source code (vhdl language)
FPGALcd1602
- lcd1602 fpga 驱动 液晶1602的FPGA 驱动,VHDL编写-lcd 1602 fpga driver
xor
- 异或门的FPGA实现的verilog代码-xor FPGA realization of the verilog code
lcd_driver
- 用FPGA控制12864液晶输出时钟信息 很好 可以根据自己的需要更改 -12864 LCD control with FPGA clock output information can be very good according to their need to change the
IIR
- FPGA的IIR算法描述,希望对大家有用-IRR arithetics using fpga
zzz
- FPGA大赛的优秀论文。T3A智能型公交车站牌、基于Nios的指纹识别系统、家庭便携式远程医疗监护仪 。-FPGA Contest outstanding papers. T3A smart card bus station, the Nios-based fingerprint identification system, the family of portable telemedicine monitor.
dds_v3_test3
- DDS控制器在FPGA上的实现,使用Quartus II8.1开发环境,使用Altera 原理图设计方法,10位宽度,配合dac9-DDS controller in the FPGA on the realization of Quartus II8.1 use development environment, the use of Altera schematic design, 10-bit width, with dac900
1231234
- FFT在fpga下实现-FFT in fpga to achieve! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! !
alu_struct
- ALU written in VHDL, tested in FPGA advantage, there will be no support on this code. All right reserved by developer.
VHDL
- 再FPGA上經由VGA顯示一半黑一半白的圖示-By the FPGA and then VGA display half black half white icon
PPT
- 大学EDA课程的课件以及课后部分习题的程序。包括最基本的加法器、计数器、LED显示以及部分高级VHDL程序。-University of EDA software programs, as well as some after-school exercise procedures. Including the most basic adder, counter, LED display, as well as some high-level VHDL procedures.
TESTRAM
- FPGA,双口RAM测试程序,仿真双口RAM工作时序,对时序的理解!适合对双口RAM不太了解的初学者使用!QUARTUSII8.0软件平台仿真通过!-FPGA, dual-port RAM testing procedures, simulation of dual-port RAM timing work, the understanding of the timing! Suitable for dual-port RAM of the beginners do not know much