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搜索资源 - Verilog Source code
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奇偶校验码的VERILOG源码,为MODELSIM下的一个工程。有测试文件。-parity VERILOG source code for MODELSIM of a project. A test document.
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8051的源代码-8051 source code
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MODELSIM 环境下的Verilog 源代码,实现全加器功能-MODELSIM environment Verilog source code, the entire increase functionality
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一个可综合的串并转换接口verilog源代码-a comprehensive series of conversion and interface Verilog source code
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一个电子中的verilog实验源代码。适合verilog初学者学习参考-an electronic experiments of Verilog source code. Suitable for beginners learning Verilog reference
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47译码器器的verilog源代码,经过编译仿真的,绝对真确,对初学者很有帮助-47 decoder for verilog source code, compiled simulation, absolute authenticity, helpful for beginners
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8*8的乘法器verilog源代码,经过编译仿真的,绝对真确,对初学者很有帮助-8 * 8 Multiplier verilog source code, compiled simulation, absolute authenticity, helpful for beginners
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Viterbi算法的Verilog源代码。-Viterbi Algorithm Verilog source code.
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ddr2 controller, verilog source code from xilinx
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一个小单片机的verilog源代码, 包含说明文档-a small SCM verilog source code contains documentation
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RS编码的源代码使用Verilog在Xinloinx平台-RS coding using the source code in Verilog Xinloinx platform
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Verilog源码15.rar--Source code 15 for Verilog.
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Verilog源码11.rar--Source code 11 for Verilog.
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成型滤波器的verilog代码--Verilog source code for formatted wave filter.
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主要完成数字电视前端信号处理和缓冲作用的verilog源代码,可以直接使用 -the major digital TV front-end signal processing and buffer the Verilog source code can be used directly
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这是8位微处理器的Verilog源代码,可以欠在Flex10k10里面-This is the 8-bit microprocessor Verilog source code, can they owed in Flex10k10
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线形反馈移位寄存器(LFSR)是数字系统中一个重要的结构,本程序可以自动产生AHDL,VHDL,Verilog的源代码及电路原理图。程序可以运行在win98/2000/NT平台-linear feedback shift register (LFSR) digital system is an important structure, the process can be automatically generated AHDL, VHDL, Verilog source code and ci
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flash接口控制器的VHDL以及verilog源代码和Testbench程序-flash interface controller VHDL and Verilog source code and procedures Testbench
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Verilog&Vhdl混语言对SDRAM的控制源代码,提供了很好的例子,顶层文件为sdrm.v!-VerilogVhdl mixed language SDRAM control of the source code, provided a good example of top-level documents sdrm.v!
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基于FPGA的直接数字频率合成器(DDS)设计
(源程序),FPGA-based direct digital synthesizer (DDS) design (source code)
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