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This zip file contains the verilog source code for square root calculation and its test bench
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用verilog编写实现的I2C协议源码，自带控制台，解压后用ISE打开工程文件即可。-Prepared achieved with the I2C protocol verilog source code, comes with the console, after decompression project file can be opened with the ISE.
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用verilog编写实现的CAN总线控制器源码，自带testbench，解压后用ISE打开工程文件即可。-Prepared with the verilog source code to achieve the CAN bus controller, bring their own testbench, after decompression project file can be opened with the ISE.
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用verilog编写实现的以太网控制器（MAC）源码，解压后用ISE打开工程即可。-Prepared using verilog implementation Ethernet Controller (MAC) source code, open the project after decompression can be used ISE.
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基于verilog编写以太网激励程序源代码-Ethernet-based incentive program write verilog source code
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王金明verilog算法设计教程的配套源程序与答案-Wang Jinming algorithm design tutorial verilog source code and answers matching
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Verilog source code for a clock generator
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JTAG Verilog source code
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DDR SDRAM控制器verilog代码及中文说明文档,对DDR开发很有用的哈。-Verilog source code for DDR SDRAM controler design,including guide book in chinese.
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verilog编写的读写SRAM的源码，包括sram的读写控制-SRAM read and write verilog source code written in, including the sram to read and write control
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PI controller and its source code
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reed solomon encoder (255,239) verilog source code
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Compression ZingZang RTL Verilog source code
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Web Camera System Verilog source code
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bench verilog 源代码，适用于图像开发-bench verilog source code, apply to the image development
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H.264标准解码器全部verilog源码，包括帧内、帧间、变换编码、熵编码、滤波等所有模块和著名的6502的软件源码-The standard H.264 decoder all verilog source code, including the frame, frame, transform coding, entropy coding, filtering all modules and the famous 6502' s software source code
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RS232_串口通信的发送端verilog源程序代码-RS232_ serial communication sender verilog source code
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全数字锁相环的Verilog源代码，经过仿真调试-All-digital PLL Verilog source code, through the simulation to debug
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source code for USB 2.0 fonction core in verilog
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九个verilog源码例子，包括寄存器，状态机等，含testbench-9 verilog source code examples, including registers, state machines, with testbench
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