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一个基于FPGA和CCD的视觉处理硬件平台项目开发文档-The design is a first step towards a
hardware implementation of the super-resolution algorithms and other multimedia projects.The design presented in this paper may be used as a platform for many multimedia and image pro
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基于分布式算法数字滤波器 VHDL语言编写 适用于FPGA-Digital filters based on distributed algorithms written in VHDL for FPGA
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Encryption algorithms are becoming
more necessary to ensure data is securely transmitted
over insecure communication channels. FOX is
a recently developed algorithm and its structure is
based on the already proven IDEA (International
Data E
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SMS4是用于WLAN的国内官方公布的第一个商用密码算法，具有较好的抗破解能力。本代码提出了一种新型的基于FPGA硬件实现的SMS4分组密码算法电路的设计。-SMS4 for WLAN in the domestic first official commercial cryptographic algorithms, and has good resistance to cracking ability. The code proposes a new FPGA-based hardware
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这是本人开发的基于labview实现JEPG图像编码压缩并解码输出的程序，由于JPEG图像在FPGA编程中太大无法传输，先将其压缩成U8数组在进行传输 这个example中写入了一些压缩算法-This is my labview-based development to achieve JEPG compression image coding and decoding the output of the program, because the FPGA programming JPEG im
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在FPGA中，采用verilog HDL语言实现图像处理算法sobel，仿真实验通过-In the FPGA using verilog HDL language image processing algorithms sobel, simulation experiment
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Real-time performance of adaptive digital signal processing algorithms is required in many applications but it often means a high computational load for many conventional processors. In this paper, we present a configurable hardware architecture for
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Field-programmable gate arrays (FPGAs) are on the verge of revolutionizing
digital signal processing in the manner that programmable digital signal processors (PDSPs) did nearly two decades ago. Many front-end digital signal
processing (DSP) algo
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基于FPGA的疲劳驾驶检测系统设计。本系统集图像采集、存储、算法处理、报警于一体。利用FPGA并行处理数据的特
点使系统检测速度达到了视频源25帧／秒的速度，满足了实时性要求。该系统检测准确
率较高、体积小、功耗小、成本低，市场前景广阔。-Driver fatigue detection system based on FPGA design. The system combines image acquisition, storage, processing algorithms an
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《通信IC设计》一书的随书代码，作者是从事芯片工作，提供了大量的通信底层算法的FPGA代码以及wifi，lte的matlab代码-" Communication IC Design," a book with the book code, the author is engaged in the work of the chip, providing a large number of communication underlying algorithms FPGA code
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Vivado是Xilinx最新的FPGA设计工具，支持7系列以后的FPGA及Zynq 7000的开发。与之前的ISE设计套件相比，Vivado可以说是全新设计的。无论从界面、设置、算法，还是从对使用者思路的要求，都是全新的。看在Vivado上，Tcl已经成为唯一支持的脚本，此文件是vivado是tcl命令的集合。(Vivado is Xilinx's latest FPGA design tool that supports development of FPGAs and Zynq 7000s
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